Semiconductor Package Layout With Floating Dummy Bumps for Bump Coplanarity
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Solution Overview
Problem
The challenge in semiconductor packaging lies in maintaining uniformity and coplanarity of conductive bumps as dimensions and pitches shrink, leading to issues in the manufacturing process.
Innovation Solution
Incorporating dummy bumps around the periphery of the conductive bumps during the manufacturing process, which are formed simultaneously and remain electrically floating, helps maintain uniformity and coplanarity, especially in the peripheral regions of the bump array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conductive bumps are formed with smaller dimensions and pitches to meet packaging density requirements, then packaging capacity increases, but uniformity and coplanarity of the bumps deteriorate
Solution Approach 1:
The patent applies local quality by forming dummy bumps specifically at peripheral regions and areas with lower bump densities, while maintaining different structures for central high-density regions. This localized approach addresses the uniformity and coplanarity issues in specific problem areas without altering the overall bump array design, allowing smaller dimensions and pitches to be used while maintaining manufacturing precision in critical regions.
Solution Approach 2:
The dummy bumps act as intermediary structures that mediate between the conductive bumps and the substrate. These dummy bumps compensate for process variations and provide a reference plane that helps maintain coplanarity of the conductive bumps, enabling smaller bump dimensions to be formed with acceptable uniformity and coplanarity.
2Manufacturing precision
If dummy bumps are added around the periphery of conductive bumps, then bump uniformity and coplanarity improve, but device complexity increases
Solution Approach 1:
The dummy bumps are implemented only in peripheral regions and areas where uniformity and coplanarity are problematic, rather than throughout the entire bump array. This localized implementation improves manufacturing precision in critical areas while minimizing the increase in overall device complexity.
Solution Approach 2:
The dummy bumps are simple copies of the conductive bump structure, using the same formation process and similar geometry but without electrical connections. This copying approach improves uniformity and coplanarity through the presence of additional structural references while keeping the added complexity minimal, as the dummy bumps use identical formation processes and materials.
3Productivity
If dummy bumps are formed simultaneously with conductive bumps, then manufacturing process efficiency improves, but electrical connection reliability may be compromised
Solution Approach 1:
The patent segments the bump structures into two categories: conductive bumps with electrical connections and dummy bumps without electrical connections. Both are formed simultaneously in the same process, but the dummy bumps are deliberately designed to be electrically isolated (floating), ensuring that the simultaneous formation process does not compromise the electrical connection reliability of the conductive bumps while maintaining manufacturing efficiency.
Data Source
AI summary
A semiconductor package and a manufacturing method for the semiconductor package are provided. The semiconductor package includes a redistribution layer, a semiconductor die, conducting connectors, dummy bumps and an underfill. The semiconductor die is disposed on a top surface of the redistribution layer and electrically connected with the redistribution layer. The conducting connectors are disposed between the semiconductor die and the redistribution layer, and are physically and electrically connected with the semiconductor die and the redistribution layer. The dummy bumps are disposed on the top surface of the redistribution layer, beside the conducting connectors and under the semiconductor die. The underfill is disposed between the semiconductor die and the redistribution layer and sandwiched between the dummy bumps and the semiconductor die. The dummy bumps are electrically floating. The dummy bumps are in contact with the underfill without contacting the semiconductor die.