Dummy Cell Voltage Sequencing for NAND Program Disturbance
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Solution Overview
Problem
As semiconductor devices scale down, increasing memory density leads to undesired coupling and interference between memory cells, causing program disturbance and reducing data reliability, which affects performance and reliability of non-volatile memory devices.
Innovation Solution
Implementing a memory device with dummy cells and specific voltage schemes that apply different voltages to select and dummy word lines to manage electron flow during programming, minimizing program disturbance by turning off dummy cells before select transistors, thereby reducing unintended programming of unselected cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If memory devices are scaled down to increase memory density, then device integration and capacity are improved, but program disturbance between adjacent memory cells increases
Solution Approach 1:
The patent divides the memory string into segments by introducing dummy cells that act as isolation barriers between selected and unselected memory cells. These dummy cells are controlled independently through separate word lines, creating electrical segmentation that prevents charge interference between adjacent memory cells during programming operations.
Solution Approach 2:
The dummy cells serve as intermediary elements between the select transistor and the memory cells. By controlling the dummy cells through dummy word lines with specific voltages, the patent creates an intermediate control layer that mediates the electrical interaction between the select transistor and unselected memory cells, preventing unwanted charge transfer.
2Speed
If voltage is applied to the selected word line to program a target memory cell, then programming speed is improved, but unintended programming of adjacent unselected cells occurs
Solution Approach 1:
The patent applies preliminary action by setting specific voltages on dummy word lines before and during the programming operation. The dummy cells are pre-configured with appropriate voltages to ensure they remain in an off-state during programming, preventing charge transfer to unselected cells before the harmful effect can occur.
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the voltage levels on dummy word lines and select lines during different phases of the programming operation. By changing the voltage parameters at critical moments, the patent controls the state of dummy cells to prevent program disturbance while allowing efficient programming of selected cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution effectively reduces program disturbance, enhancing data retention and reliability by controlling electron migration and self-boosting voltage levels, thus improving the performance and lifespan of memory devices.
Implementation Method 1
controlling electron migration and self-boosting voltage levels
Implementation Method 2
controlling electron migration and self-boosting voltage levels
Data Source
AI summary
In some aspects, a memory device is provided. The memory device includes a plurality of memory strings and a peripheral circuit. One of the memory strings includes memory cells, a select transistor coupled to a select line and a bit line, and a dummy cell coupled to a dummy word line and arranged between the select transistor and the memory cells. The peripheral circuit is coupled to the memory strings and configured to, in a pre-pulse period of a program operation, maintain a first voltage on the select line to retain an on-state of the select transistor and apply a second voltage to the dummy word line to turn off the dummy cell. After applying the second voltage to the dummy word line, the peripheral circuit is further configured to apply a third voltage to the select line to turn off the select transistor.