3D Memory Array TAV Layout Using Dummy Channel Replacement
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory array technologies face challenges in increasing integrated circuitry density and efficiently forming three-dimensional arrays of memory cells with effective electrical access, particularly in NAND architecture, where the stair-step structure and through-array-vias (TAVs) require precise patterning and material replacement to ensure operational functionality.
Innovation Solution
The method involves forming a stack of vertically-alternating insulative and conductive tiers, where operative channel-material strings are directly electrically coupled to conductor tiers, and dummy channel-material strings are replaced with insulator material to create operative and dummy TAVs, allowing for direct electrical coupling and uniform patterning, enabling the formation of functional memory cells and TAVs within the memory array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If three-dimensional memory arrays are formed with vertically-stacked memory cells, then integrated circuitry density is increased, but manufacturing precision requirements increase due to the need for precise patterning and material replacement
Solution Approach 1:
The memory array is segmented into multiple vertical tiers with alternating insulative and conductive layers. Each tier can be independently patterned and processed, allowing complex three-dimensional structures to be built through repeated modular fabrication cycles rather than requiring single-step high-precision patterning of the entire structure.
Solution Approach 2:
Sacrificial channel material is deposited and patterned in advance to define the locations of through-array-vias before the actual conductive interconnects are formed. This preliminary structuring allows subsequent processing steps to be performed with relaxed precision requirements, as the sacrificial material serves as a template for later via formation.
2Reliability
If through-array-vias are formed to provide electrical access to memory cells, then electrical connectivity is improved, but device complexity increases due to multiple material replacement steps
Solution Approach 1:
Sacrificial channel material serves as an intermediary structure that temporarily occupies the via locations during fabrication. This intermediary allows the via positions to be defined early in the process while deferring the actual formation of conductive interconnects to later steps, simplifying the overall process flow by breaking down the complex via formation into manageable stages.
Solution Approach 2:
The electrical properties of the via regions are changed through selective material replacement. sacrificial channel material (insulating or semiconducting) is replaced with conductive interconnect material, transforming the electrical characteristics of these regions from non-conductive to conductive, thereby establishing electrical connectivity without requiring complex simultaneous structuring.
3Manufacturing precision
If dummy channel-material strings are replaced with insulator material, then uniform patterning is achieved, but loss of substance occurs
Solution Approach 1:
Dummy channel-material strings are intentionally created and then discarded by replacing them with insulator material. These sacrificial structures serve their purpose during fabrication by defining via locations and maintaining pattern uniformity, then are removed and replaced with appropriate materials. The material loss is acceptable because the sacrificial structures are temporary and enable the formation of functional devices.
Data Source
AI summary
A method used in forming a memory array comprising strings of memory cells and operative through-array-vias (TAVs) comprises forming a stack comprising vertically-alternating insulative tiers and conductive tiers. The stack comprises a TAV region and an operative memory-cell-string region. Operative channel-material strings are formed in the stack in the operative memory-cell-string region and dummy channel-material strings are formed in the stack in the TAV region. At least a majority of channel material of the dummy channel-material strings is replaced in the TAV region with insulator material and operative TAVs are formed in the TAV region. Other methods and structures independent of method are disclosed.