Dummy Charge Pump Feedback for PLL Current Mismatch Compensation
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Solution Overview
Problem
Sub-sampling phase-locked loops (SSPLLs) face challenges in compensating for charge pump output current mismatch due to channel-length modulation, which limits the control voltage locking range and decreases the gain of the sub-sampling phase detector, leading to increased phase noise and gain distortion.
Innovation Solution
The implementation of a compensated charge pump with a dummy charge pump and feedback loops that generate compensation currents to eliminate current mismatch, ensuring the dummy charge pump does not have current mismatch by loading it with high impedance, thereby matching the biasing and compensation of the primary charge pump.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional charge pump is used in SSPLL, then the circuit structure is simple, but current mismatch occurs due to channel-length modulation which limits control voltage locking range and increases phase noise
Solution Approach 1:
The patent creates a dummy charge pump that is an exact copy of the main charge pump, including identical transistors M1-M4 and current sources Iup0 and Idn0. This dummy charge pump replicates the current mismatch characteristics of the main charge pump, allowing the compensation circuit to cancel out the mismatch effects in the main charge pump by applying equal and opposite compensation currents.
Solution Approach 2:
The patent implements a feedback mechanism where the control voltage Vctrl is fed back to the dummy charge pump, and the output currents from both the main and dummy charge pumps are combined through current sources Gm1 and Gm2. The feedback loop continuously adjusts the compensation currents to maintain equal up and down currents, thereby eliminating current mismatch and expanding the control voltage locking range.
2Ease of operation
If charge pump current mismatch is present, then the circuit operation is straightforward, but gain distortion increases and sub-sampling phase detector gain decreases
Solution Approach 1:
The patent introduces a compensation circuit as an intermediary between the charge pump and the rest of the SSPLL system. This compensation circuit, consisting of current sources Gm1 and Gm2 controlled by transistors M5-M12, acts as a mediator that cancels out the harmful current mismatch effects before they propagate to the sub-sampling phase detector, thereby maintaining gain accuracy without complicating the overall system operation.
3Ease of manufacture
If charge pump current mismatch occurs, then the basic charge pump function is maintained, but phase noise increases and loop stability deteriorates
Solution Approach 1:
The patent creates a dummy charge pump that is an exact copy of the main charge pump, including identical transistors M1-M4 and current sources Iup0 and Idn0. This dummy charge pump replicates the current mismatch characteristics of the main charge pump, allowing the compensation circuit to cancel out the mismatch effects in the main charge pump by applying equal and opposite compensation currents.
Solution Approach 2:
The patent implements a feedback mechanism where the control voltage Vctrl is fed back to the dummy charge pump, and the output currents from both the main and dummy charge pumps are combined through current sources Gm1 and Gm2. The feedback loop continuously adjusts the compensation currents to maintain equal up and down currents, thereby eliminating current mismatch and expanding the control voltage locking range.
Data Source
AI summary
The disclosed embodiments provide various compensated charge pumps (CPs) which have a current mismatch compensation circuitry and various CP output-current-mismatch compensation structures based on using a dummy charge pump (CPdum) and feedback loops. In some embodiments, the CPdum is identically biased as the CP to be compensated. CPdum is configured to sense the output voltage and use the feedback loops to generate compensation currents for the CP. The compensation currents simultaneously compensate CP and CPdum. Moreover, CPdum is loaded with high impedance so that the compensation current makes sure CPdum doesn't have current mismatch. Because CP and CPdum have identical biasings and are compensated in the same manner with the same amount of current, CP output current mismatch is hence effectively eliminated.


