Dummy Copper Pattern Balances PCB Warpage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The imbalance of conductive material between the top and bottom sides of printed circuit board (PCB) units in semiconductor devices leads to warpage, causing manufacturing defects such as mold bleed and flying PCB units during compressive molding, due to uneven encapsulation and improper alignment of contact pads.
Innovation Solution
A dummy copper pattern is introduced on the bottom side of the PCB units to balance the conductive material distribution, ensuring equal surface area coverage and reducing warpage, thereby preventing mold bleed and maintaining proper alignment during encapsulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If contact pads on the top side of PCB unit are formed larger, then registration tolerance and equipment capability are improved, but conductive material imbalance between top and bottom sides causes warpage
Solution Approach 1:
The patent applies asymmetry by intentionally creating an asymmetric distribution of conductive material through the dummy pattern. The dummy copper pattern is placed only on the bottom side of the PCB unit, creating an asymmetric configuration that compensates for the larger top contact pads. This asymmetric addition of conductive material on the bottom side balances the overall conductive material distribution between top and bottom sides, preventing warpage while maintaining the necessary large top contact pads for registration tolerance.
Solution Approach 2:
The dummy copper pattern acts as a counterweight to balance the conductive material distribution. By adding extra conductive material on the bottom side through the dummy pattern, the patent creates a counterbalancing effect that offsets the excess conductive material on the top side from the larger contact pads. This counterweight approach ensures equal total conductive material coverage on both sides, preventing warpage during encapsulation.
2Ease of manufacture
If top contact pads are made larger for equipment capability, then manufacturing ease is improved, but warpage causes mold bleed and flying PCB units during compressive molding
Solution Approach 1:
The dummy copper pattern serves as a counterweight that balances the conductive material distribution between top and bottom sides of the PCB unit. By adding this dummy pattern on the bottom side, the patent compensates for the larger top contact pads, ensuring equal total conductive material coverage on both sides. This balance prevents warpage during encapsulation, thereby eliminating mold bleed and flying PCB units defects while maintaining the ease of manufacture benefits from larger top contact pads.
3Reliability
If conductive material is increased on top side for better interconnection, then electrical connectivity is improved, but imbalance causes warpage and manufacturing defects
Solution Approach 1:
The dummy copper pattern acts as a counterweight to balance the conductive material distribution. By adding this dummy conductive material on the bottom side of the PCB unit, the patent creates a balanced configuration where the total conductive material coverage on the bottom side equals that on the top side. This balance prevents warpage that would otherwise occur due to the heavier top side, thereby maintaining both electrical connectivity and alignment accuracy during manufacturing.
Data Source
AI summary
A semiconductor device has a substrate. A conductive via is formed through the substrate. A plurality of first contact pads is formed over a first surface of the substrate. A plurality of second contact pads is formed over a second surface of the substrate. A dummy pattern is formed over the second surface of the substrate. An indentation is formed in a sidewall of the substrate. An opening is formed through the substrate. An encapsulant is deposited in the opening. An insulating layer is formed over second surface of the substrate. A dummy opening is formed in the insulating layer. A semiconductor die is disposed adjacent to the substrate. An encapsulant is deposited over the semiconductor die and substrate. The first surface of the substrate includes a width that is greater than a width of the second surface of the substrate.