Dummy DIMM Testing via Boundary Scan Interconnect
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Solution Overview
Problem
There is a lack of systematic test solutions for dummy dual in-line memory modules (DIMM), leading to difficulties in locating faults such as open-circuit or short-circuit issues, which complicates production and increases costs and time.
Innovation Solution
A dummy dual in-line memory module testing system based on boundary scan interconnect, utilizing a test fixture and unit under test connected through a test access port (TAP) device, which transmits control and data signals to perform boundary scan testing, allowing for the identification of faults through signal pins and boundary scan registers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional testing methods are used for dummy DIMM modules, then the testing process becomes complicated and time-consuming, but the fault location capability remains insufficient
Solution Approach 1:
The patent introduces a test fixture with boundary scan interconnect as an intermediary system between the test equipment and the dummy DIMM module. This test fixture includes TAP controllers and boundary scan registers that mediate the testing process, enabling automated fault location through systematic signal transmission and analysis, thereby improving both measurement precision and reducing testing time
Solution Approach 2:
The patent replaces traditional manual or mechanical testing methods with an automated electronic testing system based on boundary scan interconnect technology. The TAP controller and boundary scan registers automate the fault detection and location process through electronic signal transmission, eliminating time-consuming manual operations and improving testing efficiency
2Reliability
If no systematic test solution is implemented, then production costs increase due to defective boards entering the production line, but implementing traditional testing methods lacks systematic fault diagnosis capability
Solution Approach 1:
The patent segments the test system into distinct functional modules: a test fixture with boundary scan interconnect, a TAP controller, boundary scan registers, and test equipment. This segmentation allows each component to perform its specific function systematically, improving production reliability through comprehensive testing while managing complexity through modular design
Solution Approach 2:
The test fixture designed in the patent serves multiple functions: it acts as both a testing device and a diagnostic system, capable of detecting various types of faults (open-circuit, short-circuit, continuity issues) across different pins and traces. This multi-functionality improves production reliability without requiring multiple separate testing systems
3Difficulty of detecting and measuring
If boundary scan interconnect testing is implemented, then fault detection capability is improved, but the device complexity increases due to additional test fixtures and signal pins
Solution Approach 1:
The boundary scan interconnect acts as an intermediary layer between the test equipment and the dummy DIMM module, providing standardized signal paths through TAP controllers and boundary scan registers. This intermediary structure simplifies the testing process by establishing systematic signal transmission paths, improving fault detection capability while managing complexity through standardized interfaces
Solution Approach 2:
The patent utilizes parameter changes in the boundary scan registers, such as shifting between different test modes (test-in, test-out, capture, shift) and manipulating signal states (high/low, continuous/pulsed). These parameter changes enable comprehensive fault detection through varied testing sequences without requiring additional hardware complexity
Data Source
AI summary
A dummy dual in-line memory module (DIMM) testing system based on boundary scan interconnect and a method thereof. A dummy dual in-line memory module functioning normally is used as a test fixture, a dummy dual in-line memory module under test is served as an unit under test (UUT), and the test fixture and the unit under test are inserted into a test device to electrically connect to each other, so that the test access port (TAP) device can perform boundary scan to control the test fixture to test the unit under test through signal pins, and check a test result based on a data signal collected from at least one boundary scan register. Therefore, the effect of improving testing convenience of the dummy DIMM can be achieved.