Dummy-Electrode Capacitance in Shared-Bias Display Pixels
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Solution Overview
Problem
Existing display devices face challenges in reducing the arrangement area for pixels to increase resolution while maintaining consistent luminance between pixels.
Innovation Solution
The display device incorporates a first and second pixel design that shares a bias transistor, with each pixel featuring a driving transistor, a switching transistor, and a capacitor, and includes a dummy electrode that provides parasitic capacitance to optimize pixel layout and reduce surface area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the surface area for arranging pixel elements is increased, then the resolution of the display device is improved, but the arrangement area requirement increases
Solution Approach 1:
The patent merges the bias transistor from one pixel with adjacent pixels to form a shared bias transistor. Specifically, the bias transistor is positioned at the boundary between pixels and serves multiple pixels simultaneously, reducing the total number of transistors per pixel and minimizing the arrangement area while maintaining resolution
Solution Approach 2:
The shared bias transistor performs the biasing function for multiple pixels simultaneously, making a single transistor serve multiple functions across different pixels. This multi-functionality reduces the overall component count and arrangement area required for the display device
2Measurement precision
If pixels share a bias transistor to reduce arrangement area, then the resolution is improved, but luminance uniformity between pixels may deteriorate
Solution Approach 1:
The patent introduces dummy electrodes with different capacitance values positioned near different pixels. The first dummy electrode has a first capacitance value and the second dummy electrode has a second capacitance value, creating local variations that compensate for the shared bias transistor effects and maintain luminance uniformity across pixels with different spatial characteristics
Solution Approach 2:
The patent adjusts the capacitance parameters of dummy electrodes to compensate for luminance variations. By setting different capacitance values (first capacitance value and second capacitance value) for dummy electrodes positioned near different pixels, the system dynamically balances the electrical characteristics to maintain uniform luminance output across all pixels
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances resolution by minimizing pixel arrangement area and reduces luminance differences between pixels, thereby improving display quality.
Implementation Method 1
The dummy electrode may include a first portion, which extends outward from the gate electrode to overlap the source region when viewed on a plane, and provides the source region and a first parasitic capacitance, and a second portion which extends outward from the gate electrode to overlap the drain region when viewed on the plane, and provides the drain region and a second parasitic capacitance.
Data Source
AI summary
Provided is a display device including a first pixel and a second pixel. Each of the first pixel and the second pixel may include a light emitting element, a driving transistor connected to the light emitting element and a power line and controlled by a voltage of a first node, a switching transistor connected to a data line and a second node and controlled by a write scan signal, a capacitor connected to the first node and the second node, and a bias transistor connected to the driving transistor and a bias line, and controlled by a bias scan signal. The first and second pixels may share the bias transistor.