Dummy Fill Structures for Eddy Current Suppression
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Solution Overview
Problem
Modern semiconductor devices face manufacturing issues such as dishing or cupping of upper layers during chemical mechanical planarization (CMP) processes due to the high density of metal layers and decreasing pattern dimensions, which affect the planarity of interconnect layers and induce eddy currents in passive devices like inductors.
Innovation Solution
The implementation of metal dummy fill structures with a main branch and extending legs positioned to suppress eddy currents, which are integrated into the interlevel dielectric material and fabricated using conventional IC technologies like deposition, lithography, and etching, to improve planarity and prevent performance degradation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If metal layers are deposited over the entire surface and pattern dimensions are decreased to achieve high device density, then device integration density is improved, but planarity of interconnect layers deteriorates causing dishing or cupping during CMP processes
Solution Approach 1:
The patent introduces dummy fill structures as intermediary elements between the metal interconnect layers and the CMP process. These dummy fill structures serve as a mediator that absorbs the mechanical stress and distributes the polishing pressure uniformly across the wafer surface, preventing direct contact between the CMP tool and the delicate interconnect patterns, thereby eliminating dishing and cupping while maintaining high device density
Solution Approach 2:
The patent changes the physical and chemical parameters of the interlevel dielectric material by incorporating dummy fill structures with specific material composition, shape, and distribution. The dummy fill structures have different mechanical properties (hardness, elasticity) compared to the standard dielectric material, which modifies the overall mechanical behavior of the interlayer during CMP processing, enabling uniform planarization without damaging the underlying interconnect patterns
2Reliability
If unused areas adjacent to inductor loops are left void of metal and filled with dielectric material, then inductor performance is improved, but eddy currents are induced in passive devices during operation
Solution Approach 1:
The patent extracts the harmful eddy current effect by removing continuous metal paths from the unused areas adjacent to inductor loops. Instead of leaving complete voids or filling with standard dielectric material, the patent introduces dummy fill structures that are deliberately designed to interrupt eddy current paths while maintaining the electrical isolation required for inductor performance, thereby extracting the harmful electromagnetic effect while preserving the beneficial electrical properties
Solution Approach 2:
The patent converts the potentially harmful presence of dielectric material in unused areas into a beneficial structure by incorporating dummy fill elements. These dummy fill structures serve dual purposes: they maintain the mechanical support and planarity provided by dielectric filling, while simultaneously acting as eddy current suppressors through their specific geometric configuration and material properties, thus converting a potential harm into a benefit
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dummy fill structures effectively suppress eddy currents, enhance the quality factor of passive devices, and meet CMP density requirements, leading to improved RF performance and reduced dishing or cupping issues.
Implementation Method 1
the at least two extending legs being positioned and structured to suppress eddy currents of the passive device
Implementation Method 2
suppress eddy currents
Data Source
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to dummy fill structures and methods of manufacture. The structure includes: a passive device formed in interlevel dielectric material; and a plurality of metal dummy fill structures composed of at least one main branch and two extending legs from at least one side of the main branch, the at least two extending legs being positioned and structured to suppress eddy currents of the passive device.