Dummy Fin Profile Shaping for Active Gate Formation Windows
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Solution Overview
Problem
In advanced technology nodes, the fabrication of non-planar field-effect-transistor (FET) devices faces challenges in achieving optimal integration density and process window for forming active gate structures, particularly in high and low density areas of a substrate, where dummy fins play a crucial role in separating active gate structures without compromising functionality.
Innovation Solution
The method involves forming dummy fins with reshaped profiles in low density areas to enlarge the process window for forming active gate structures, allowing for improved integration density without affecting the functionality of the dummy fins, by selectively altering the dimensions and shape of the dummy fins between adjacent semiconductor fins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dummy fins are formed with standard profiles in both high and low density areas, then the fabrication process is simple and uniform, but the process window for forming active gate structures is limited in low density areas
Solution Approach 1:
The patent applies local quality by forming dummy fins with different profiles in different density areas. In low density areas, dummy fins are formed with reshaped profiles (different width at different heights) to enlarge the process window for active gate structure formation, while in high density areas, standard profiles are maintained. This localized differentiation resolves the contradiction by optimizing each area's specific requirements without compromising overall fabrication simplicity.
Solution Approach 2:
The substrate is segmented into high density areas and low density areas, with different dummy fin profile strategies applied to each segment. This segmentation allows the patent to tailor the dummy fin characteristics to the specific needs of each density region, enabling improved process window in low density areas while maintaining standard fabrication approaches in high density areas.
2Productivity
If integration density is increased by reducing minimum feature size, then more components can be integrated into a given area, but the process window for forming active gate structures decreases
Solution Approach 1:
The patent addresses this contradiction by implementing local quality through area-specific dummy fin profiles. In low density areas where process window is naturally larger, reshaped dummy fin profiles are used to further enlarge the process window, enabling better control during active gate structure formation. This local optimization allows integration density to be increased without uniformly compromising the process window across the entire substrate.
Data Source
AI summary
A method includes forming a dielectric fin over a substrate between a first semiconductor fin and a second semiconductor fin. The first and second semiconductor fins, and the dielectric fin all extend along a first lateral direction. The method includes forming a dummy gate structure that extends along a second lateral direction and includes a first portion and a second portion. The first and second portions overlay the first and second semiconductor fins, respectively, and separate from each other with the dielectric fin. The method includes removing upper sidewall portions of the dielectric fin. The method includes replacing the first and second portions of the dummy gate structure with a first and second active gate structures, respectively.