Dummy Fin Segmentation for FinFET Etching Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The semiconductor industry faces challenges in achieving higher device density, reduced leakage current, and short-channel effects in three-dimensional designs like FinFETs, which require innovative manufacturing methods for active fins and gate structures.
Innovation Solution
A method for manufacturing semiconductor devices involving the formation of active fins on a substrate, followed by the creation of dummy fins with multiple layers of different materials, and the formation of gate structures that overlap these fins, allowing for precise control of etching and reducing AC penalty and height loss.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional FinFET designs are used, then device density can be increased, but AC penalty and height loss occur due to etching challenges
Solution Approach 1:
The patent divides the fin structure into multiple segments by introducing dummy fins with different material compositions. The active fins contain semiconductor material while dummy fins contain dielectric material, creating distinct segments that can be selectively processed. This segmentation allows the etching process to differentiate between active and dummy structures, reducing AC penalty by preventing over-etching into active fins while still removing dummy fin material.
Solution Approach 2:
The patent applies local quality by giving different material compositions to different parts of the fin structure. Active fins maintain semiconductor material (e.g., silicon) while dummy fins are filled with dielectric material (e.g., silicon oxide or silicon nitride). This local differentiation in material properties enables selective etching and protects active fin regions from excessive etching, thereby reducing AC penalty while maintaining device density.
2Ease of operation
If gate structures are formed over active fins, then device functionality is achieved, but height loss occurs during etching processes
Solution Approach 1:
The patent introduces dummy fins as intermediary structures that act as sacrificial elements during etching processes. These dummy fins, composed of etchable dielectric material, serve as mediators that absorb excess etching energy and protect the active fins from over-etching. The intermediary dummy fin structures enable the gate formation process to proceed while preserving the critical height of active fins, thus maintaining both device functionality and fin height.
3Manufacturing precision
If multiple materials are used in dummy fins, then etching control is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by varying the material composition parameters of dummy fins to achieve different etching rates and selectivities. By changing the dielectric material type (silicon oxide, silicon nitride, etc.) or their ratios in composite structures, the etching process can be precisely controlled to remove dummy fin material while stopping before damaging active fins. This parameter adjustment enables superior etching control without requiring fundamentally new manufacturing processes, thus improving precision while limiting complexity increase.
Data Source
AI summary
A semiconductor device includes a substrate, a first active fin, a second active fin, a dummy fin and a first gate structure. The first and the second active fin are on the substrate and extend along a first direction. The dummy fin is disposed between the first active fin and the second active fin, and extends in the first direction. The dummy fin includes a plurality of layers, and each of the layers includes a material different from another layer. The first gate structure crosses over the dummy fin, the first and the second active fins.


