Dummy Fin Stabilization for FinFET Cell Row Consistency
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Solution Overview
Problem
The characteristics of fin transistors in semiconductor integrated circuits are significantly influenced by cell arrangement, leading to variations in current and capacitance, which can decrease performance and increase costs due to the need for design margins.
Innovation Solution
Incorporating dummy fins in standard cells to establish a constant distance between active and dummy fins, regardless of adjacent cell configurations, thereby stabilizing current and capacitance characteristics of active transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If standard cells with fin transistors are arranged adjacently in different configurations, then cell arrangement flexibility is improved, but fin transistor characteristics (current and capacitance) vary significantly
Solution Approach 1:
The patent applies preliminary action by introducing dummy fins at predetermined positions within standard cells before actual cell arrangement. These dummy fins are placed in advance to ensure that active fins always have a consistent distance to their nearest fin neighbor, regardless of adjacent cell configurations. This pre-positioning of dummy fins stabilizes the oxide definition spacing effect and physical stress conditions, thereby maintaining consistent fin transistor characteristics while allowing flexible cell arrangement.
2Reliability
If design margins are increased to account for fin transistor characteristic variations, then reliability is improved, but circuit performance decreases and manufacturing cost increases
Solution Approach 1:
The patent applies parameter changes by modifying the physical structure of standard cells through the addition of dummy fins. This structural parameter change ensures that the distance parameter between active fins and their nearest neighbors remains constant, thereby stabilizing electrical parameters such as current and capacitance characteristics. By controlling the geometric parameter (fin spacing), the patent eliminates the need for excessive design margins, improving both reliability and productivity simultaneously.
3Manufacturing precision
If dummy fins are added to standard cells to stabilize fin transistor characteristics, then manufacturing precision is improved, but device complexity increases
Solution Approach 1:
The patent applies copying by creating dummy fins that replicate the structural form of active fins but serve a different function. These dummy fins are copies of the fin structure that are positioned strategically to provide the necessary spacing reference for active fins. By using simplified copy structures rather than complex active transistor designs, the patent achieves manufacturing precision while minimizing the increase in device complexity.
Data Source
AI summary
Disclosed herein is a semiconductor integrated circuit device which includes a standard cell with a plurality of fins extending in a first direction and arranged in a second direction that is perpendicular to the first direction. An active fin of the fins forms part of an active transistor. A dummy fin of the fins is disposed between the active fin and an end of the standard cell.