Dummy-Fin FinFET Layout for Wider Etch Window and CD Control

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Solution Overview

Problem

Current semiconductor manufacturing processes face challenges in enlarging the fin etch process window, achieving better critical dimension loading for strained source and drain epitaxial processes, improving CVD stress effects, enhancing wafer acceptance tests, and improving circuit probe yield performance.

Innovation Solution

The process involves forming a fin structure with a stack of mask layers, patterning and etching to create crown-shaped fin structures, removing dummy fins to expose substrate portions, and forming shallow trench isolation regions, which allows for the formation of active and dummy fin structures with specific protrusions and isolation, enabling improved fin etch processes and device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional planar transistor structures are used, then manufacturing process is simple, but device performance and scaling capability deteriorate

Engineering Contradiction:
Improvedevice performanceVSAvoidtransistor structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions from planar (2D) transistor structures to FinFET (3D) structures by creating vertically extending fins from the substrate. This dimensional change increases the effective channel area and improves device performance while enabling continued scaling. The fin structures extend upward from the substrate surface, creating a three-dimensional architecture that overcomes the limitations of conventional planar transistors.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If fin etch process parameters are optimized for high aspect ratios, then fin structure formation improves, but process window and manufacturing flexibility deteriorate

Engineering Contradiction:
Improvefin structure formationVSAvoidprocess window
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent applies preliminary actions by forming dummy fins and adjusting substrate conditions before the main fin etch process. These preparatory steps modify the etch environment and loading effects in advance, creating more favorable conditions for achieving high aspect ratio fins with acceptable process windows. The dummy structures are removed after serving their purpose, leaving the desired fin configuration.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by modifying etch process conditions, including gas flow rates, pressure, temperature, and chemistry composition, to optimize fin formation. Multiple etch parameters are adjusted simultaneously to achieve the desired balance between fin aspect ratio and process window, allowing flexible manufacturing across different device geometries.

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If critical dimension control is tightened for better loading effects, then epitaxial process quality improves, but manufacturing complexity and process time deteriorate

Engineering Contradiction:
Improvecritical dimension controlVSAvoidmanufacturing efficiency
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent uses preliminary actions by forming dummy fins and adjusting substrate conditions before the main fin etch process. These preparatory steps modify the etch environment and loading effects in advance, creating more favorable conditions for achieving high aspect ratio fins with acceptable process windows. The dummy structures are removed after serving their purpose, leaving the desired fin configuration.

Inventive Principle:
Principle #10Preliminary action

4Reliability

If CVD process conditions are optimized for stress control, then device reliability improves, but process complexity and manufacturing time deteriorate

Engineering Contradiction:
Improvedevice reliabilityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs parameter changes by modifying etch process conditions, including gas flow rates, pressure, temperature, and chemistry composition, to optimize fin formation. Multiple etch parameters are adjusted simultaneously to achieve the desired balance between fin aspect ratio and process window, allowing flexible manufacturing across different device geometries.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12176424B2FinFET device comprising plurality of dummy protruding features
Publication Date: 2024.12.24 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12176424B2 patent drawing
  • US12176424B2 patent drawing
  • US12176424B2 patent drawing

AI summary

A method includes forming a first active fin structure and a second active fin structure on a substrate. A dummy fin structure is formed on the substrate, the dummy fin structure being interposed between the first active fin structure and the second active fin structure. The dummy fin structure is removed to expose a first portion of the substrate, the first portion of the substrate being disposed directly below the dummy fin structure. A plurality of protruding features is formed on the first portion of the substrate. A shallow trench isolation (STI) region is formed over the first portion of the substrate, the STI region covering the plurality of protruding features, at least a portion of the first active fin structure and at least a portion of the second active fin structure extending above a topmost surface of the STI region.