Bottom-Up Dummy Gate Filling for Void-Free FinFET Trenches
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Solution Overview
Problem
As semiconductor devices continue to shrink in feature size, challenges arise in the manufacturing process, particularly in the gap-filling of high aspect ratio trenches and fins, leading to issues such as seam and void formation during the deposition of dielectric layers, which affect the integrity and performance of FinFETs.
Innovation Solution
A method involving the formation of a bottom seed structure using a flowable silicon precursor, followed by a bottom-up deposition process with a chlorine-containing silicon precursor, which allows for seamless filling of trenches without voids, utilizing a seed layer treatment to remove impurities and ensure selective growth on silicon while avoiding growth on dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional deposition methods are used to fill high aspect ratio trenches, then the trenches can be filled with dielectric material, but seams and voids form during deposition, reducing structural integrity
Solution Approach 1:
A seed layer is deposited on the trench bottom and sidewalls before the main dielectric layer deposition. This preliminary seed layer provides a controlled nucleation surface that ensures uniform growth of the subsequent dielectric material, preventing void formation and seams during the filling process of high aspect ratio trenches
Solution Approach 2:
The deposition process uses localized control of deposition conditions, particularly at the trench bottom and sidewalls where the seed layer is formed. The seed layer has different properties (thickness, composition) compared to the bulk dielectric layer, enabling controlled growth that prevents defects while maintaining overall filling quality
2Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but manufacturing complexity and process difficulty increase
Solution Approach 1:
The dielectric layer deposition process is segmented into multiple distinct steps: seed layer deposition followed by main dielectric layer deposition. This segmentation allows each step to be optimized independently, with the seed layer step addressing the specific challenges of high aspect ratio trench filling at reduced feature sizes, thereby managing manufacturing complexity while enabling higher integration density
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of FinFETs by preventing seam and void formation, improving the structural integrity and reducing defects in the dielectric layers, thereby maintaining high aspect ratio trench filling efficiency.
Implementation Method 1
condensing the flowable silicon precursor into a film
Implementation Method 2
depositing the flowable silicon material in the trench
Implementation Method 3
performing a bottom-up deposition using a second flowable silicon precursor, the second flowable silicon precursor including a chlorine-containing silicon precursor
Data Source
AI summary
A system and methods of manufacturing semiconductor devices is described herein. The method includes forming a recess between fins in a substrate and forming a dielectric layer over the fins and in the recess. Once the dielectric layer has been formed, a bottom seed structure is formed over the dielectric layer within the recess and the dielectric layer is exposed along sidewalls of the recess. A dummy gate material is grown from the bottom seed structure in a bottom-up deposition process without growing the dummy gate material from the dielectric layer exposed along sidewalls of the recess.