Dummy Gate Removal via Hydrogenation for Metal Gate Devices
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Solution Overview
Problem
The reduction in gate structure dimension and thickness of silicon oxide gate dielectric layers in semiconductor devices leads to leakage current, and the use of high-k materials as gate dielectric layers results in Fermi-level pinning and increased threshold voltage, while conventional metal gate formation methods often leave behind undesirable dummy gate residues that deteriorate device performance.
Innovation Solution
A method involving the formation of a semiconductor device where a dummy gate is completely removed through a dry etching process followed by a hydrogenation treatment and subsequent wet etching using specific gases and etchants, such as H2, Cl2, and tetramethyl ammonium hydroxide, to form a gate trench without residues, thereby improving metal gate performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional wet etching process is used to remove the dummy gate, then the process is simple, but dummy gate residues remain that deteriorate device performance
Solution Approach 1:
A hydrogenation treatment is performed on the dummy gate surface before the wet etching process. This preliminary action modifies the surface chemistry of the dummy gate by introducing hydrogen atoms, which enhances the etching rate and ensures complete removal of the dummy gate material without leaving residues, thereby improving device performance
Solution Approach 2:
The etching process parameters are changed by introducing a hydrogenation step that alters the chemical state of the dummy gate surface. This parameter change (from untreated silicon surface to hydrogenated surface) significantly increases the etching rate and enables complete removal of the dummy gate material
2Length of moving object
If the gate dielectric layer thickness is reduced to maintain scaling, then the device dimension is reduced, but leakage current increases
Solution Approach 1:
The gate dielectric material is changed from silicon oxide to high-k material, which has a higher dielectric constant. This parameter change allows the use of thicker dielectric layers while maintaining the same electrical performance, thereby reducing leakage current while still enabling device scaling
3Object-generated harmful factors
If high-k material is used as gate dielectric to reduce leakage current, then leakage current is reduced, but Fermi-level pinning occurs causing threshold voltage increase
Solution Approach 1:
A dummy gate structure is introduced as an intermediary element that allows the high-k gate dielectric to be formed and processed without direct contact between the polysilicon gate and the high-k material. The dummy gate is completely removed after metal gate formation, preventing Fermi-level pinning while enabling the use of high-k materials to reduce leakage current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures complete removal of dummy gates, enhancing the performance of metal gate devices by preventing residue formation and improving etching rates, and is easily integratable into existing CMOS processes, providing competitive advantages.
Implementation Method 1
A dry etching process is performed to remove a portion of the dummy gate of the gate structure
Implementation Method 2
A hydrogenation treatment is performed to a surface of the remaining dummy gate. The hydrogenation treatment reduces an amount of a crystallographic plane {111} in the dummy gate
Implementation Method 3
A wet etching process is performed to remove the remaining dummy gate and thereby form a gate trench. An etchant used in the wet etching process includes tetramethyl ammonium hydroxide (TMAH)
Data Source
AI summary
A method of forming a semiconductor device is provided. At least one gate structure including a dummy gate is formed on a substrate. A contact etch stop layer and a dielectric layer are formed to cover the gate structure. A portion of the contact etch stop layer and a portion of the dielectric layer are removed to expose the top of the gate structure. A dry etching process is performed to remove a portion of the dummy gate of the gate structure. A hydrogenation treatment is performed to the surface of the remaining dummy gate. A wet etching process is performed to remove the remaining dummy gate and thereby form a gate trench.