Continuous Dummy Gate Electrodes for Interconnect Pitch Reduction

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Solution Overview

Problem

The increasing complexity and density of integrated circuits in VLSI technology pose challenges in efficiently interconnecting cells, leading to a need for reduced metal line usage and pitch between adjacent cells, while maintaining signal transmission efficiency.

Innovation Solution

The use of continuous, electrically conductive dummy gate electrodes that span across multiple cells, allowing for signal transmission instead of traditional metal lines, thereby reducing the number of metal lines required and minimizing pitch between cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If traditional metal lines are used to interconnect cells, then signal transmission is achieved, but the amount of metal lines increases and pitch between cells increases

Engineering Contradiction:
Improveamount of metal linesVSAvoidsignal transmission efficiency
Core Design Contradiction:
Quantity of substanceVSEase of operation

Solution Approach 1:

The gate electrode structure is designed to serve dual functions: as the control electrode for the transistor and as an interconnect for signal transmission between cells. This eliminates the need for separate metal lines for interconnection, directly reducing the quantity of metal lines while maintaining signal transmission capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent combines the gate electrode with the interconnect function by making the gate electrode continuous across cell boundaries. This merging of functions allows the same structural element to perform both transistor control and signal routing, thereby reducing the overall amount of metal material needed.

Inventive Principle:
Principle #5Merging (Combining)

2Quantity of substance

If continuous dummy gate electrodes are used to span across multiple cells, then the amount of metal lines is reduced, but the device complexity increases

Engineering Contradiction:
Improveamount of metal linesVSAvoiddevice complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The continuous gate electrode structure is divided into functional segments corresponding to individual transistors, where each segment serves as a gate for its respective transistor. This segmentation allows the continuous structure to be manufactured using standard patterning processes while maintaining the simplicity of the overall design.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the pitch between adjacent cells is minimized, then circuit density is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecircuit densityVSAvoidmanufacturing precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The continuous gate electrode creates an equipotential structure that extends across cell boundaries, eliminating the need for additional alignment margins between cells. This approach allows cells to be placed closer together without compromising manufacturing yield, as the continuous structure is less sensitive to minor alignment variations.

Inventive Principle:
Principle #12Equipotentiality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces the amount of metal lines needed for interconnecting cells, allowing for more compact and efficient integrated circuit designs while maintaining signal integrity.

Implementation Method 1

The use of continuous, electrically conductive dummy gate electrodes that span across multiple cells, allowing for signal transmission

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS10950594B2Integrated circuit and method of fabricating the same
Publication Date: 2021.03.16 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US10950594B2 patent drawing
  • US10950594B2 patent drawing
  • US10950594B2 patent drawing

AI summary

A layout includes a plurality of cells and at least one dummy gate electrode continuously extends across the cells. Since the dummy gate electrode is electrically conductive, the dummy gate electrode can be utilized for interconnecting the cells. That is, some signals may travel through the dummy gate electrode rather than through a metal one line or a metal two line. Therefore, an amount of metal one lines and/or metal two lines for interconnecting the cells can be reduced.