Dummy Gate Stack Implantation to Correct Necking Profiles
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Solution Overview
Problem
The scaling down of semiconductor integrated circuit (IC) devices leads to increased complexity in forming features of desirable shape, particularly due to necking profiles in dummy gate stacks, which hinder the deposition of metal gate stacks.
Innovation Solution
A method involving the implantation of a dummy gate stack with a semiconductor material like germanium, followed by an anneal process, to generate stress that alleviates necking profiles, resulting in upright sidewalls for the gate trench and improved metal gate stack deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dummy gate stack is formed with conventional processes, then fabrication can proceed through subsequent steps, but the dummy gate stack develops necking profile that complicates metal gate stack deposition
Solution Approach 1:
The patent applies preliminary action by performing semiconductor material implantation into the dummy gate stack before metal gate deposition. This pre-treatment modifies the dummy gate structure to prevent necking profile formation, ensuring that when the metal gate is subsequently deposited, the underlying structure has the desired shape for proper metal gate formation.
Solution Approach 2:
The patent changes physical parameters of the dummy gate stack by implanting semiconductor materials (such as silicon or germanium) at specific energies and doses. This alters the structural properties of the dummy gate, transforming it from a necking profile to an upright profile suitable for metal gate deposition.
2Manufacturing precision
If dummy gate stack has necking profile, then it can be formed through standard fabrication, but this results in poor metal gate stack deposition quality
Solution Approach 1:
The patent performs preliminary semiconductor material implantation into the dummy gate stack to create an upright profile before metal gate deposition. This pre-modification of the dummy gate structure ensures that the subsequent metal gate deposition proceeds with high precision and quality, avoiding the problems associated with necking profiles.
Solution Approach 2:
By changing the structural parameters of the dummy gate through material implantation (altering composition and physical properties), the patent enables high-precision metal gate deposition. The implantation process modifies the dummy gate's physical characteristics to match the required geometry for quality metal gate formation.
3Reliability
If conventional gate-last process is used, then manufacturing can be simplified, but device failure rate increases due to necking profile issues
Solution Approach 1:
The patent applies preliminary semiconductor material implantation into the dummy gate stack to prevent necking profile formation. This pre-treatment step ensures that the dummy gate maintains an upright profile throughout subsequent processing, thereby reducing device failures and improving yield without significantly complicating the overall fabrication process.
Solution Approach 2:
By modifying the physical and chemical parameters of the dummy gate through material implantation, the patent eliminates the necking profile problem that causes device failures. This parameter change approach improves device reliability and yield while maintaining process simplicity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively rectifies necking profiles in dummy gate stacks, leading to improved gate trench profiles and enhanced deposition of metal gate stacks, thereby reducing device failure and improving yield.
Implementation Method 1
A method involves the implantation of a dummy gate stack with a semiconductor material like germanium, followed by an anneal process, to generate stress that alleviates necking profiles
Implementation Method 2
followed by an anneal process, to generate stress that alleviates necking profiles
Data Source
AI summary
Methods of forming a semiconductor device are provided. A method according to the present disclosure includes forming, over a workpiece, a dummy gate stack comprising a first semiconductor material, depositing a first dielectric layer over the dummy gate stack using a first process, implanting the workpiece with a second semiconductor material different from the first semiconductor material, annealing the dummy gate stack after the implanting, and replacing the dummy gate stack with a metal gate stack.