Dummy-Gate Backside Power Routing for Multi-Track BEOL Access

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Solution Overview

Problem

Conventional semiconductor technologies face challenges in providing efficient power and ground access to source/drain epitaxial regions, as they often require via-to-backside power rails, limiting access to multiple signal tracks and increasing manufacturing complexity.

Innovation Solution

The implementation of a backside power supply rail connected to the frontside BEOL wire layer through dummy gates, which eliminates the need for via-to-backside power rails, allowing source/drain regions to access multiple signal tracks and enabling power and ground routing without additional processing steps, while being compatible with existing techniques.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If via-to-backside power rails (VBPR) are used to provide power access, then power delivery is achieved, but space is consumed and access to multiple signal tracks is limited

Engineering Contradiction:
Improveaccess to signal tracksVSAvoidspace occupied by power rail structure
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The dummy gate structure serves multiple functions: it provides power/ground access to the frontside BEOL wire layer, enables source/drain regions to contact multiple signal tracks, and maintains compatibility with conventional processing. By making the gate structure multi-functional (serving both as a transistor gate and a power delivery pathway), the patent eliminates the need for separate VBPR structures, thereby freeing up space while improving routing flexibility

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The dummy gate acts as an intermediary structure that connects the backside power supply rail to the frontside BEOL wire layer. Instead of directly using VBPR to penetrate through the substrate, the patent introduces dummy gates with gate tie-downs as intermediate elements that facilitate power delivery while preserving space for additional signal track access

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of manufacture

If via-to-backside power rails are implemented, then power access is provided, but manufacturing complexity increases

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidpower rail structure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the power delivery function with the existing gate structure. By combining the transistor gate (or dummy gate) with the power supply connection through gate tie-downs, the design eliminates the need for separate VBPR manufacturing steps. This integration reduces device complexity while maintaining ease of manufacture, as the power rail structure is formed using standard gate fabrication processes rather than additional through-substrate via processes

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If conventional power rail structures are used, then power delivery is achieved, but routing flexibility to multiple signal tracks is limited

Engineering Contradiction:
Improverouting flexibilityVSAvoidpower access structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the power delivery function from the traditional monolithic VBPR structure and distributes it through multiple dummy gates positioned at different locations. This segmentation allows source/drain regions to access multiple signal tracks independently, as each dummy gate can be connected to different signal tracks above it, thereby enhancing routing flexibility while keeping the overall structure manageable

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20240234316A9Local VDD And VSS Power Supply Through Dummy Gates with Gate Tie-Downs and Associated Benefits
Publication Date: 2024.07.11 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240234316A9 patent drawing
  • US20240234316A9 patent drawing
  • US20240234316A9 patent drawing

AI summary

An integrated circuit structure includes a power supply rail formed in a backside of a semiconductor wafer. The integrated circuit structure also includes a frontside BEOL wire layer connected to the power supply rail through a gate, wherein the gate is of a type to be powered off by a power supply coupled through the gate from the power supply rail to the first frontside BEOL wire layer. A method of forming an integrated circuit structure includes forming a power supply rail in a backside of a semiconductor wafer, forming a gate in the semiconductor wafer, and forming a frontside BEOL wire layer connected to the power supply rail through the gate. Again, the gate is of a type to be powered off by a power supply coupled through the gate from the power supply rail to the first frontside BEOL wire layer.