Dummy Gate Surface Smoothness via Fluorine Etching
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Solution Overview
Problem
Current Chemical Mechanical Planarization (CMP) processes struggle to achieve the necessary surface smoothness and thickness uniformity for dummy gate material layers in semiconductor manufacturing, leading to poor device performance.
Innovation Solution
A method involving first etching with a fluorine-containing gas based on surface roughness, followed by forming a fluorine-containing polymer layer and subsequent second etching to improve surface smoothness and thickness uniformity, using specific conditions such as temperature settings, gas compositions, and etching parameters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If existing CMP process is used, then the process complexity is low, but the device performance deteriorates due to poor surface smoothness
Solution Approach 1:
The patent introduces fluorine-containing gas as an intermediary substance in the etching process. This intermediary enables selective removal of material at controlled rates, achieving the required surface smoothness and thickness uniformity for device performance while maintaining a manageable process complexity through well-established semiconductor manufacturing techniques
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively enhances the surface smoothness and thickness uniformity of the dummy gate material layer, thereby improving the performance of semiconductor devices.
Implementation Method 1
performing, according to surface roughness of the dummy gate material layer, first etching on the dummy gate material layer using a fluorine-containing gas
Implementation Method 2
placing the substrate structure on an electro-static chuck (ESC), and setting a temperature of each region of the ESC according to the surface roughness of the dummy gate material layer, where in the ESC, a temperature of a region corresponding to the raised portion is higher than a temperature of a region corresponding to the recessed portion
Implementation Method 3
depositing a fluorine-containing polymer layer on the dummy gate material layer using a gas mixture containing CH3F and Cl2 and using an inert gas as a carrier gas under a condition of a zero-bias voltage
Data Source
AI summary
The present disclosure relates to the field of semiconductor technologies, and discloses a method for manufacturing a semiconductor apparatus. An implementation of the method may include: providing a substrate structure; depositing a dummy gate material layer on the substrate structure; performing planarization processing on the dummy gate material layer; after the planarization processing, performing, according to surface roughness of the dummy gate material layer, first etching on the dummy gate material layer by using a fluorine-containing gas; after the first etching, forming a fluorine-containing polymer layer on the dummy gate material layer; and performing second etching on the substrate structure on which the fluorine-containing polymer layer is formed, to remove the fluorine-containing polymer layer, where the second etching includes etching a surface of the dummy gate material layer. The method of the present invention improves surface smoothness and thickness uniformity of the dummy gate material layer.