Dummy Gate Patterning With Implanted Photoresist Stress Control
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Solution Overview
Problem
The semiconductor industry faces challenges in reducing distortion and line width variations in gate structures during the manufacturing of semiconductor devices, particularly due to stress unbalance and etching issues during the patterning process.
Innovation Solution
The method involves implanting a hard mask formed over a dummy gate material before patterning, using an ion bombardment process to dope the photoresist bottom layer, which reduces compressive stress and increases sp3 hybridization, resulting in a low-aspect-ratio patterned implanted bottom layer that provides high etching resistance and minimizes distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional patterning processes are used for dummy gates, then manufacturing simplicity is maintained, but distortion and line width variations increase
Solution Approach 1:
The patent applies preliminary action by performing dopant implantation into the photoresist bottom layer before the patterning process. This pre-treatment modifies the photoresist properties in advance, reducing distortion during subsequent etching operations and improving dummy gate patterning precision without adding significant process complexity
Solution Approach 2:
The patent changes physical parameters of the photoresist material by implanting dopants, which alters the stress state and etching characteristics of the photoresist bottom layer. This parameter modification enables better pattern fidelity and reduced line width variations during the patterning process
2Stability of the object's composition
If photoresist bottom layer is used without dopant implantation, then process simplicity is maintained, but stress and distortion increase
Solution Approach 1:
The patent changes the stress parameter of the photoresist bottom layer by implanting dopants, transforming the stress state from high to low. This parameter change stabilizes the photoresist composition during patterning, reducing distortion while the implantation process itself remains a standard semiconductor manufacturing technique
Solution Approach 2:
The dopant acts as an intermediary that modifies the photoresist bottom layer properties. By introducing dopant atoms into the photoresist, the material's stress and etching characteristics are altered, serving as a mediating step between the photoresist deposition and the final patterning operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the distortion of dummy gates, reduces line width variations, and enhances the etching process by neutralizing stress, leading to more precise and reliable semiconductor device fabrication.
Implementation Method 1
performing an implantation process to the photoresist bottom layer to form an implanted bottom layer with a second stress closer to 0 than the first stress
Data Source
AI summary
A method includes forming a fin structure over a substrate; depositing a dummy gate layer over the substrate and the fin structure; depositing a hard mask stack over the dummy gate layer; depositing a photoresist bottom layer over the hard mask stack, wherein the photoresist bottom layer has a first stress; performing an implantation process to the photoresist bottom layer to form an implanted bottom layer with a second stress closer to 0 than the first stress; patterning the implanted bottom layer; patterning the hard mask stack and the dummy gate layer by using the patterned implanted bottom layer as an etch mask to form a dummy gate structure over the fin structure; and replacing the dummy gate structure with a metal gate structure.