Dummy Gate Geometry for Void-Free Metal Gate Filling
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Solution Overview
Problem
Conventional gate replacement processes in semiconductor manufacturing often result in voids in metal gate electrodes due to overhangs caused by the small critical dimensions and high aspect ratios of gate structures, leading to degraded semiconductor device performance.
Innovation Solution
A novel etching process is used to form dummy gate electrodes with a top portion wider than the bottom portion, facilitating easier filling of openings with metal materials and reducing void formation in metal gate electrodes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional gate replacement processes are used, then metal gate electrodes can be formed, but overhangs are created in the openings which impede filling and cause voids
Solution Approach 1:
The patent inverts the conventional gate structure by forming a top-wide bottom-narrow dummy gate electrode instead of the traditional top-narrow bottom-wide structure. This inversion creates an overhang-free opening that facilitates complete metal filling without voids, directly resolving the filling completeness issue while eliminating the harmful overhang effect.
2Reliability
If dummy gate electrodes with conventional geometry are used, then gate replacement can proceed, but overhangs form that degrade device performance
Solution Approach 1:
The patent applies structural inversion by creating a top-wide bottom-narrow dummy gate electrode geometry, which is the reverse of conventional designs. This inverted structure eliminates overhang formation during gate replacement, thereby improving device reliability by preventing the harmful effects of overhang-induced voids and filling defects.
3Productivity
If small critical dimensions and high aspect ratios are used, then device scaling is achieved, but overhangs are more pronounced and filling becomes difficult
Solution Approach 1:
The patent addresses the scaling challenge by inverting the dummy gate geometry to top-wide bottom-narrow configuration. This inversion counteracts the overhang formation tendency that becomes more severe with small critical dimensions and high aspect ratios, enabling complete metal filling even in scaled devices and maintaining manufacturing precision despite increased scaling demands.
Data Source
AI summary
A polysilicon layer is formed over a substrate. The polysilicon layer is etched to form a dummy gate electrode having a top portion with a first lateral dimension and a bottom portion with a second lateral dimension. The first lateral dimension is greater than, or equal to, the second lateral dimension. The dummy gate electrode is replaced with a metal gate electrode.


