Dummy Gate Deposition Sequence to Prevent FinFET Void Seams
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Solution Overview
Problem
In semiconductor device fabrication, particularly for FinFET and GAAFET devices, voids or seams often form in dummy gate structures due to the formation of dummy channels between real channels prior to dummy gate material deposition.
Innovation Solution
The method involves depositing a first dummy gate material over semiconductor fins before forming the dummy fin material, thereby avoiding voids or seams in the dummy gate structure. This order of processing steps ensures that the dummy fins are formed after the first dummy gate material is deposited, followed by a second dummy gate material deposition for completion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dummy channels are formed between real channels prior to dummy gate material deposition, then the dummy gate structure can be created, but voids or seams form in the dummy gate structure
Solution Approach 1:
The patent applies preliminary action by depositing the first dummy gate material over the semiconductor fins before forming the dummy fin material. This reverses the conventional sequence where dummy channels are formed first, then dummy gate material is deposited. By performing the material deposition in advance, the patent prevents voids or seams from forming in the dummy gate structure, thereby improving both manufacturing precision and device yield.
2Ease of manufacture
If dummy fins are formed before dummy gate material deposition, then the dummy gate structure can be created, but voids or seams form in the dummy gate material
Solution Approach 1:
The patent applies inversion by reversing the conventional formation sequence. Instead of forming dummy fins first and then depositing dummy gate material (which causes voids or seams), the patent deposits the first dummy gate material over the semiconductor fins before forming the dummy fin material. This inverted sequence eliminates the formation of voids or seams in the dummy gate material while maintaining ease of manufacture through a systematic process reversal.
3Productivity
If conventional processing steps are used for dummy gate formation, then the process is simple, but voids or seams form reducing device yield
Solution Approach 1:
The patent applies preliminary action by performing the first dummy gate material deposition before forming the dummy fin material, rather than following the conventional sequence. This preliminary deposition ensures that when subsequent processing steps are performed, no voids or seams form in the dummy gate structure, thereby improving device yield. The increased processing step sequence is offset by the elimination of defective structures that would require rework or scrapping.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves device yield by preventing voids or seams in the dummy gate material, enhancing the reliability and performance of non-planar transistor devices like FinFETs and GAAFETs.
Implementation Method 1
depositing a first dummy gate material over semiconductor fins before forming the dummy fin material
Data Source
AI summary
A method of fabricating a semiconductor device is disclosed. The method includes forming semiconductor fins on a substrate. A first dummy gate is formed over the semiconductor fins. A recess is formed in the first dummy gate, and the recess is disposed between the semiconductor fins. A dummy fin material is formed in the recess. A portion of the dummy fin material is removed to expose an upper surface of the first dummy gate and to form a dummy fin. A second dummy gate is formed on the exposed upper surface of the first dummy gate.