Dummy Structure for HV-LV Gate Dielectric Interface

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Solution Overview

Problem

The integration of high voltage (HV) and low voltage (LV) devices on a single chip poses a challenge due to the boundary between HV and LV regions, where the thicker HV gate oxide layer can cause defects and compatibility issues with the thinner LV gate oxide layer, leading to performance and reliability concerns.

Innovation Solution

A dummy structure is formed between the HV and LV regions using a polysilicon layer, which is patterned to create a conformal interface with the HV gate dielectric, allowing for the formation of gate electrodes and eliminating boundary defects caused by polysilicon residue, while being easily integratable into existing processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thicker gate oxide layer is used for high voltage devices, then high voltage performance is improved, but boundary defects and compatibility issues occur at the interface with low voltage regions

Engineering Contradiction:

Improvehigh voltage device performanceVSAvoidboundary defects at HV-LV interface

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A dummy structure is introduced as an intermediary element between the high voltage and low voltage regions. This dummy structure has a thickness that transitions from the thicker HV gate oxide to the thinner LV gate oxide, serving as a mediator that eliminates abrupt interface discontinuities and prevents boundary defects while allowing both HV and LV devices to function properly

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If different gate oxide thicknesses are used for HV and LV devices on the same die, then voltage level requirements are met, but manufacturing complexity and interface compatibility issues arise

Engineering Contradiction:

Improvevoltage level compatibilityVSAvoidgate dielectric structure complexity

Core Design Contradiction:

Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The gate dielectric structure is segmented into distinct regions: a first gate dielectric for high voltage devices with greater thickness, a second gate dielectric for low voltage devices with lesser thickness, and a dummy structure that bridges between them. This segmentation allows each region to be optimized for its specific voltage requirement while the dummy structure maintains overall interface compatibility

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different gate oxide thicknesses are applied locally to different regions of the die based on voltage requirements. The dummy structure implements local quality by having its thickness vary spatially - thicker near the HV region and thinner near the LV region - thereby matching the local electrical requirements at each position along the interface

Inventive Principle:

Principle #3Local quality

Data Source

PatentUS9356108B2Dummy structure for multiple gate dielectric interface and methods

Publication Date: 2016.05.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Dummy structures between a high voltage (HV) region and a low voltage (LV) region of a substrate are disclosed, along with methods of forming the dummy structures. An embodiment is a structure comprising a HV gate dielectric over a HV region of a substrate, a LV gate dielectric over a LV region of the substrate, and a dummy structure over a top surface of the HV gate dielectric. A thickness of the LV gate dielectric is less than a thickness of the HV gate dielectric. The dummy structure is on a sidewall of the HV gate dielectric.