Dummy Lines in Display Gate Driver ICs

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Solution Overview

Problem

Existing display devices face issues with the number of channels in gate driver ICs being excessive, leading to increased size and manufacturing costs, as well as image-quality defects due to electric field differences between data and gate connection lines.

Innovation Solution

The display device incorporates MCC packages with reduced gate driver IC channels and includes dummy lines parallel to gate connection lines, which are applied a low voltage, allowing for a more efficient layout and preventing electric field differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the number of channels of gate driver IC is increased to match the number of gate lines, then the gate driver can drive all gate lines, but the size and manufacturing cost of the gate driver IC increases

Engineering Contradiction:
Improvenumber of gate lines drivenVSAvoidnumber of channels of gate driver IC
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The gate driver IC channels are segmented into two groups: first channels connected to first gate lines and second channels connected to second gate lines. This segmentation allows the gate driver to drive more gate lines by utilizing both groups of channels, effectively increasing adaptability while managing device complexity through organized channel allocation.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The gate driver IC is designed with multiple channels that can be universally applied to drive different gate lines. The same gate driver structure serves multiple functions by driving both first gate lines through first channels and second gate lines through second channels, increasing versatility without proportionally increasing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If data lines are connected to source lines without sufficient spacing from gate connection lines, then the layout is more compact, but electric field differences cause image-quality defects

Engineering Contradiction:
Improvelayout compactnessVSAvoidelectric field difference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

Dummy lines are introduced as intermediary elements between data lines and gate connection lines. These dummy lines act as mediators that maintain proper spacing and electrical isolation, preventing harmful electric field differences while allowing for compact layout. The dummy lines fill the space between functional lines without interfering with signal transmission.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The spacing and arrangement of lines are optimized locally in different regions of the display panel. In areas where data lines are connected to source lines, dummy lines are strategically placed to maintain appropriate distance from gate connection lines, creating local quality variations that prevent electric field interference while achieving overall layout compactness.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9443463B2Display device with dummy lines for reducing a number of channels of a gate driver integrated circuit
Publication Date: 2016.09.13 LG DISPLAY CO LTD
  • US9443463B2 patent drawing
  • US9443463B2 patent drawing
  • US9443463B2 patent drawing

AI summary

Disclosed is a display device. The display device includes a plurality of MCC packages each including one source driver IC and one gate driver IC disposed on a film, a panel including a plurality of data lines connected to the source driver IC, a plurality of gate connection lines that are connected to the gate driver IC and disposed in parallel to the data lines, a plurality of gate lines that are disposed vertically to the gate connection lines and the data lines and connected to the gate connection lines, and a plurality of dummy lines disposed in parallel to the gate connection lines and between the data lines, and a timing controller configured to transfer image data and a plurality of control signals to at least one or more of the MCC packages.