Dummy Memory Cell Contact Reduction for Latch-Up Prevention
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Solution Overview
Problem
In semiconductor memory manufacturing, dummy memory cells fail to prevent abnormal power supply currents due to deformation or positional displacement of photoresist, leading to latch-up issues, especially when well regions are not formed normally.
Innovation Solution
The implementation of dummy memory cells with a reduced number of first contacts, strategically positioned and shared with adjacent real memory cells, to prevent short-circuits and latch-up, while maintaining the same transistor structure as real memory cells to avoid functional deterioration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If dummy memory cells are disposed around the memory cell array to prevent photo resist deformation, then the shape stability of gates and wirings is improved, but abnormal power supply current may flow into dummy memory cells when well regions are not formed normally
Solution Approach 1:
The patent applies local quality by differentiating the contact structure between real memory cells and dummy memory cells. Real memory cells have a complete set of first contacts coupling wiring layers to diffusion layers, while dummy memory cells have fewer first contacts. This local structural differentiation ensures that dummy memory cells cannot form abnormal current paths even when well regions are deformed, while real memory cells maintain full functionality.
Solution Approach 2:
The patent extracts the harmful potential by removing certain first contacts from dummy memory cells. By taking out specific first contacts that would otherwise complete the current path between n-type and p-type well regions, the patent prevents the formation of abnormal power supply current paths in dummy memory cells while maintaining the protective function of the dummy cell structure.
2Reliability
If the number of first contacts in dummy memory cells is reduced to prevent latch-up, then reliability against abnormal current is improved, but the structural completeness of dummy memory cells is compromised
Solution Approach 1:
The patent applies local quality by differentiating the contact structure between real memory cells and dummy memory cells. Real memory cells have a complete set of first contacts coupling wiring layers to diffusion layers, while dummy memory cells have fewer first contacts. This local structural differentiation ensures that dummy memory cells cannot form abnormal current paths even when well regions are deformed, while real memory cells maintain full functionality.
Solution Approach 2:
The patent extracts the harmful potential by removing certain first contacts from dummy memory cells. By taking out specific first contacts that would otherwise complete the current path between n-type and p-type well regions, the patent prevents the formation of abnormal power supply current paths in dummy memory cells while maintaining the protective function of the dummy cell structure.
Data Source
AI summary
Dummy memory cells are disposed on an outside of real memory cells positioned on a peripheral part of a matrix. First contacts coupling between two wiring layers laminated on a semiconductor substrate are disposed around each of the real and dummy memory cells, and are shared by an adjacent real or dummy memory cell. Number of the first contacts disposed in each of the dummy memory cells is set to be smaller than number of the first contacts disposed in each of the real memory cells. Accordingly, even when a well region is not formed normally due to a variation in manufacturing conditions, it is possible to prevent an abnormal power supply current from being flown into the dummy memory cells, and an occurrence of latch up can be prevented.