Dummy Memory Cell Weak Programming for Select Gate Charge Loss
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Solution Overview
Problem
In semiconductor memory devices, particularly in 3D memory structures, there is a challenge in maintaining the threshold voltage of select gate transistors due to charge loss caused by hole migration from dummy memory cells to select gate transistors, leading to decreased performance over time.
Innovation Solution
Implementing a weak programming method using hot electron injection during the programming of dummy memory cells, which involves increasing the channel gradient between the dummy memory cell and the select gate transistor to inject electrons into the charge-trapping layer, thereby reducing charge loss and maintaining the threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy memory cells are used in memory strings, then memory device operation is enabled, but charge loss occurs due to hole migration from dummy memory cells to select gate transistors
Solution Approach 1:
The patent applies preliminary action by performing weak programming of dummy memory cells before normal programming operations. This preliminary programming injects electrons into the charge-trapping layer of dummy cells, creating a negative charge that compensates for subsequent hole migration to select gate transistors, thereby preventing threshold voltage degradation before it occurs.
Solution Approach 2:
The patent converts the harmful effect of hole migration into a beneficial mechanism. By intentionally creating a negatively charged state in dummy memory cells through weak programming, the patent transforms what would normally be a charge loss problem into a charge compensation mechanism that protects select gate transistors from threshold voltage degradation.
2Stability of the object's composition
If weak programming is performed on dummy memory cells, then threshold voltage stability is improved, but additional programming operations are required
Solution Approach 1:
The patent merges the weak programming operation for dummy memory cells with the normal programming sequence. The weak programming is performed concurrently or immediately before standard programming operations, combining multiple functions into an integrated process flow that achieves threshold voltage stabilization without significantly increasing overall device complexity or operation time.
3Loss of substance
If hot electron injection is used for weak programming, then charge loss is reduced, but energy consumption increases
Solution Approach 1:
The patent applies partial action by using hot electron injection at reduced intensity compared to full programming operations. The weak programming uses lower voltage pulses and shorter durations, providing just enough electron injection to compensate for charge loss without the full energy expenditure of complete programming, thus achieving charge loss reduction with moderated energy consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the decrease in threshold voltage of select gate transistors, enhancing the durability and reliability of memory device operations by minimizing charge loss and maintaining data integrity over repeated cycles.
Implementation Method 1
Implementing a weak programming method using hot electron injection during the programming of dummy memory cells, which involves increasing the channel gradient between the dummy memory cell and the select gate transistor to inject electrons into the charge-trapping layer
Data Source
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AI summary
A memory device and associated techniques for reducing charge loss in a select gate transistor. A dummy memory cell is weakly programmed using a hot electron injection type of disturb to reduce the movement of holes toward the adjacent select gate transistor in a common charge trapping layer. The weak programming can occur in a program loop, e.g., in a transition between a pre-charge phase and a program phase, or in an erase loop, just after the erase of dummy and data memory cells. The weak programming does not involve a time penalty since it is concurrent with other operations. The disturb can be provided by increasing the control gate voltage of the dummy memory cell and/or decreasing the control gate voltage of the select gate transistor.