Dummy Memory Cell Voltage Adjustment for NAND String Disturb
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Solution Overview
Problem
In charge-trapping memory devices, the threshold voltage of dummy memory cells can inadvertently change over time, leading to disturb issues that affect data memory cells, causing them to transition to an unreadable state due to electron-hole generation and channel voltage gradients.
Innovation Solution
Implementing a process to maintain the threshold voltage of dummy memory cells within a defined range by periodically adjusting the control gate voltage based on checkpoint voltages, using a read operation to detect deviations and applying countermeasures such as weak programming or erasing to keep the voltage within the desired range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the control gate voltage of dummy memory cells is increased to prevent inadvertent programming, then data memory cell disturb is reduced, but power consumption and risk of over-programming increase
Solution Approach 1:
The patent implements dynamic adjustment of control gate voltage for dummy memory cells based on their threshold voltage status. The voltage is increased only when needed to prevent inadvertent programming during program-erase cycles, rather than maintaining a constantly high voltage. This dynamic approach reduces power consumption while maintaining data memory cell stability.
Solution Approach 2:
The patent changes the control gate voltage parameter adaptively based on the threshold voltage of dummy memory cells. By monitoring threshold voltage changes and adjusting the control gate voltage accordingly, the system prevents harmful inadvertent programming while avoiding excessive power consumption from unnecessarily high voltages.
2Stability of the object's composition
If the control gate voltage of dummy memory cells is increased to counteract inadvertent programming, then threshold voltage stability is improved, but dummy memory cells may become over-programmed and unreadable
Solution Approach 1:
The patent implements a feedback mechanism that periodically reads the threshold voltage of dummy memory cells and adjusts the control gate voltage accordingly. This feedback loop prevents over-programming by detecting when the threshold voltage reaches appropriate levels and stopping further voltage increases, thereby maintaining both stability and readability.
Solution Approach 2:
The control gate voltage is adjusted dynamically based on the actual threshold voltage status of dummy memory cells. The system increases voltage only when needed to counteract inadvertent programming effects, and reduces or maintains voltage when the threshold voltage is already stable, preventing over-programming while ensuring stability.
3Reliability
If dummy memory cells are used to prevent data memory cell disturb, then data integrity is improved, but dummy memory cell threshold voltage drift causes harmful effects
Solution Approach 1:
The patent actively manages the threshold voltage parameter of dummy memory cells by adjusting their control gate voltage. This prevents harmful threshold voltage drift that would otherwise occur during program-erase cycles, thereby eliminating the harmful effects while preserving the data integrity benefits of using dummy memory cells.
Solution Approach 2:
The patent applies preliminary counter-actions to prevent harmful effects before they occur. By adjusting the control gate voltage of dummy memory cells in advance during program-erase cycles, the system prevents inadvertent programming and threshold voltage drift before they can harm data memory cells, rather than correcting problems after they occur.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively prevents unacceptable increases in threshold voltage, reducing the likelihood of data memory cell disturbs and maintaining data integrity over program-erase cycles and read operations.
Implementation Method 1
A charge-trapping material can be used in memory devices to store a charge which represents a data state
Implementation Method 2
using a read operation to detect deviations
Implementation Method 3
leading to disturb issues that affect data memory cells, causing them to transition to an unreadable state due to electron-hole generation and channel voltage gradients
Data Source
AI summary
A NAND string includes dummy memory cells between data memory cells and source-side and drain-side select gates. A gradual increase in threshold voltage (Vth) for the dummy memory cells which occurs due to program-erase cycles is detected by read operations at an initial upper checkpoint voltage. If the Vth has increased beyond the checkpoint, the control gate voltage of the dummy memory cells is increased during subsequent programming operations. This maintains a relatively constant channel voltage in an unselected NAND string under the dummy memory cells during a program voltage. Disturbs which can be caused by an increase in a channel voltage gradient are therefore avoided. The dummy memory cells can be periodically read at successively higher checkpoint voltages and the control gate voltage repeatedly increased. If the control gate voltage reaches a maximum allowed level, the dummy memory cells can be erased and reprogrammed.