Dummy Pad Bonding in Stacked Semiconductor Packages to Prevent Voids

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Solution Overview

Problem

In high bandwidth memory semiconductor packages, voids between semiconductor chips and molding material can lead to damage, thermal conductivity deterioration, reliability issues, performance degradation, and reduced cycle-life.

Innovation Solution

The semiconductor package includes dummy pads on the semiconductor chips, specifically first dummy pads on the back surface of the second semiconductor chip and second dummy pads on the front surface of the third semiconductor chip, which are bonded to each other to prevent void formation during molding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If semiconductor chips are stacked vertically to form high bandwidth memory, then bandwidth and power consumption are improved, but voids may form between chips and molding material causing reliability deterioration

Engineering Contradiction:
Improvepackage reliabilityVSAvoidchip stacking structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Dummy pads are formed on the semiconductor chips before the molding process. These dummy pads are strategically positioned to extend to the edge regions of the chips, creating a preliminary structure that prevents void formation during subsequent molding operations. The dummy pads serve as placeholders that ensure complete filling of the molding material and eliminate empty spaces that would otherwise form between stacked chips.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy pads act as intermediary elements between the semiconductor chips and the molding material. By extending to the edge regions and being bonded between adjacent chips, the dummy pads mediate the interface between solid components, ensuring proper adhesion and preventing the formation of voids that would compromise the reliability of the stacked memory structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If edge regions of semiconductor chips are left empty during stacking, then manufacturing is simpler, but voids form causing thermal conductivity deterioration and performance degradation

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidthermal conductivity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Rather than modifying the entire chip structure, dummy pads are strategically placed only in the edge regions where void formation is most problematic. This localized approach maintains the simplicity of the overall manufacturing process while specifically addressing the thermal conductivity issue at the critical edge regions where molding material voids would otherwise form.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The dummy pads are formed in advance during chip fabrication, extending to the edge regions before stacking. This preliminary action ensures that when chips are stacked and molded, the edge regions are already prepared to prevent void formation, eliminating the need for complex post-processing steps and maintaining manufacturing efficiency while ensuring proper thermal contact.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If dummy pads are added to semiconductor chips, then void prevention is achieved, but device complexity increases

Engineering Contradiction:
Improvebonding reliabilityVSAvoidchip structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy pads are relatively simple conductive structures that can be formed using standard semiconductor fabrication processes. While they add some structural elements to the chip, these are comparatively simple features that can be integrated into existing manufacturing flows without requiring fundamentally new process equipment or techniques, thus limiting the increase in device complexity.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The dummy pads serve multiple functions: they prevent void formation during molding, provide additional bonding surface area between stacked chips, and can potentially serve as electrical connection points. This multi-functionality justifies the added structural elements by providing multiple benefits from a single feature addition.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of dummy pads effectively prevents voids between semiconductor chips and the molding material, enhancing the reliability, thermal conductivity, and overall performance of the semiconductor package.

Implementation Method 1

the first dummy pad and the second dummy pad are bonded to each other by overlapping each other

Methodology Applied
Scientific EffectOverlapping bonding:

Data Source

PatentUS20250157962A1Semiconductor package including dummy pads and manufacturing method for the same
Publication Date: 2025.05.15 SAMSUNG ELECTRONICS CO LTD
  • US20250157962A1 patent drawing
  • US20250157962A1 patent drawing
  • US20250157962A1 patent drawing

AI summary

A semiconductor package includes: a plurality of first semiconductor chips; a second semiconductor chip including a front surface and disposed on the plurality of first semiconductor chips, and wherein the second semiconductor chip further includes a first dummy pad located on a back surface thereof; and a third semiconductor chip including a front surface and disposed on the second semiconductor chip. The third semiconductor chip further includes a second dummy pad located on the front surface thereof. The first dummy pad is disposed on at least a part of a back surface edge region that is adjacent to a side surface of the second semiconductor chip. The second dummy pad is disposed on at least a part of a front surface edge region that is adjacent to a side surface of the third semiconductor chip. The first dummy pad and the second dummy pad are bonded to each other.