Semiconductor Package Dummy Pad Layout for Close Chip Spacing

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Solution Overview

Problem

The demand for miniaturized semiconductor packages that can efficiently integrate and process large amounts of data while reducing size and weight poses challenges in achieving reliable high-density packaging solutions.

Innovation Solution

A semiconductor package design incorporating a substrate with substrate pads, semiconductor chips, connective terminals, and an underfill material layer, along with a dummy pad made of the same material as the substrate pads, to enhance integration and reliability by optimizing chip placement and material continuity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If semiconductor chips are placed closer together to achieve higher integration density, then the data processing capability and integration efficiency are improved, but the reliability of the package deteriorates due to increased stress and potential defects from reduced spacing

Engineering Contradiction:
Improvedata processing capabilityVSAvoidpackage reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A dummy pad is introduced as an intermediary element between adjacent semiconductor chips. This dummy pad serves as a buffer structure that absorbs thermal expansion stress and prevents direct stress transmission between chips, thereby maintaining reliability even when chips are placed closer together for higher integration density

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy pad is designed with the same material composition as the substrate pad, ensuring matched thermal expansion coefficients. This parameter matching prevents differential stress during temperature cycling, allowing closer chip placement without compromising package reliability

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If traditional packaging methods are used without dummy pads, then the manufacturing process is simpler, but the underfill material injection becomes more complex and less reliable when chips are placed closer together

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidunderfill injection complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The dummy pad acts as a physical guide and barrier that defines the underfill material flow path. By providing a clear boundary between adjacent chips, the dummy pad simplifies the underfill injection process, preventing material leakage and ensuring complete filling even when chips are placed closer together

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dummy pad is pre-formed on the substrate before chip mounting and underfill injection. This preliminary structure preparation creates ready-defined flow channels and barriers, eliminating the need for complex real-time control during underfill injection and reducing manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20240072000A1Semiconductor package
Publication Date: 2024.02.29 SAMSUNG ELECTRONICS CO LTD
  • US20240072000A1 patent drawing
  • US20240072000A1 patent drawing
  • US20240072000A1 patent drawing

AI summary

A semiconductor package includes a substrate; a substrate pad on the substrate; a first semiconductor chip and a second semiconductor chip on the substrate; a connective terminal between the substrate pad and the first semiconductor chip and between the substrate pad and the second semiconductor chip; a dummy pad on the substrate, and spaced apart from the substrate pad, wherein the dummy pad is between the first semiconductor chip and the second semiconductor chip; and an underfill material layer interposed between the substrate and the first semiconductor chip and between the substrate and the second semiconductor chip, wherein the dummy pad and the substrate pad include a same material.