Dummy Pad Layout for Stress-Reduced Semiconductor Bonding

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Solution Overview

Problem

The semiconductor industry faces challenges in reducing bonding risks and defects in stacked semiconductor devices due to uneven expansions and stress during the bonding process, particularly in advanced nodes, which affects the integration density and yield of semiconductor devices.

Innovation Solution

The use of dummy pads with specific shapes and dimensions between bonding pads helps to reduce stress and defects by taking up additional space and minimizing the difference in expansion between pads, thereby improving the bonding process and increasing manufacturing yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If bonding pads are placed close together to increase integration density, then area is reduced, but stress and defects increase during bonding

Engineering Contradiction:
Improvebonding areaVSAvoidbonding reliability
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

Dummy pads are introduced as intermediary structures between bonding pads. These dummy pads serve as buffer elements that absorb thermal expansion stress and prevent direct stress transfer between adjacent bonding pads, thereby maintaining bonding reliability while allowing closer pad spacing for higher integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different pad configurations locally - bonding pads with specific dimensions and shapes are placed only where electrical connection is needed, while dummy pads with varying shapes (rectangular, triangular, circular) are placed in intermediate regions. This local differentiation allows optimization of each pad type for its specific function while managing overall stress distribution.

Inventive Principle:
Principle #3Local quality

2Reliability

If dummy pads are added to reduce stress, then manufacturing complexity increases, but yield improves

Engineering Contradiction:
Improvemanufacturing yieldVSAvoidpad structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent varies parameters of dummy pads including shape (rectangular, triangular, circular), size, and positioning to optimize stress distribution. By changing these geometric parameters rather than introducing fundamentally new structures, the solution improves yield while keeping the manufacturing process compatible with existing pad fabrication techniques.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If bonding pads are made larger to reduce defects, then area increases, but integration density decreases

Engineering Contradiction:
Improvebonding defect reductionVSAvoidavailable area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The stress management function is segmented from the bonding function. Bonding pads maintain their optimized size for electrical connection, while dummy pads handle the stress distribution function. This segmentation allows bonding pads to be smaller without compromising reliability, as the dummy pads compensate for stress issues that would otherwise require larger bonding pad dimensions.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The implementation of dummy pads with varied shapes and dimensions effectively reduces defects and stress during the bonding process, leading to enhanced integration density and increased yield in semiconductor device manufacturing.

Implementation Method 1

depositing a bonding dielectric material over the first pad, the second pad, and the first set of dummy pads

Methodology Applied
Scientific EffectDeposition: Deposition (physical)

Data Source

PatentUS20240387368A1Semiconductor device and method of manufacture
Publication Date: 2024.11.21 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240387368A1 patent drawing
  • US20240387368A1 patent drawing
  • US20240387368A1 patent drawing

AI summary

A semiconductor device and method of manufacture are presented in which a first pad and a second pad are formed adjacent to each other. A first set of dummy pads is manufactured between the first pad and the second pad and bonding pads are formed in electrical connection to the first pad and the second pad.