Dummy Pads for Uniform Force Distribution in Stacked Semiconductor Chips

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Solution Overview

Problem

The semiconductor industry faces challenges in stacking high-bandwidth and high-capacity devices due to issues with bonding multiple chips, which often result in warping and non-uniform force distribution during the bonding process, leading to unstable connections and underfill material leakage.

Innovation Solution

The solution involves forming dummy pads on the semiconductor chip with the same height as contact pads, allowing a bonding tool to apply force uniformly across the chip's surface, thereby distributing force evenly and preventing warping, while ensuring stable bonding between stacked chips.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bonding tools apply force to contact pads during chip stacking, then electrical connection is established, but force distribution becomes non-uniform causing warping

Engineering Contradiction:
Improvebonding stabilityVSAvoidchip warping
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The bonding tool applies force through multiple discrete dummy pads distributed across the chip surface rather than through a single contact pad. This segmentation of force application points distributes the mechanical load uniformly, preventing localized stress concentration that causes warping while still establishing reliable electrical connections through the contact pads.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy pads serve as intermediary elements between the bonding tool and the chip structure. These dummy pads act as force distribution mediators that transfer bonding forces uniformly across the chip surface, preventing direct concentration of force on contact pads and thereby eliminating warping while maintaining bonding stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If bonding force is concentrated on contact pads, then electrical connection is formed, but underfill material leakage occurs

Engineering Contradiction:
Improveconnection stabilityVSAvoidunderfill material leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The bonding force is segmented and applied through multiple dummy pads distributed across the chip surface rather than concentrated on contact pads. This segmentation prevents excessive localized pressure that would force underfill material out through bonding interfaces, eliminating leakage while maintaining stable electrical connections.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the chip surface are assigned different functions: contact pads provide electrical connection while dummy pads provide force distribution. This local differentiation allows contact pads to form reliable connections without bearing the full bonding load, preventing underfill material leakage at the connection points.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10020290B2Semiconductor device having stacked semiconductor chips interconnected via TSV
Publication Date: 2018.07.10 SAMSUNG ELECTRONICS CO LTD
  • US10020290B2 patent drawing
  • US10020290B2 patent drawing
  • US10020290B2 patent drawing

AI summary

A semiconductor device includes at least first and second semiconductor chips stacked on each other along a first direction, at least one through-silicon-via (TSV) through at least the first semiconductor chip of the first and second semiconductor chips, a contact pad on the at least one TSV of the first semiconductor chip, the contact pad electrically connecting the TSV of the first semiconductor chip to the second semiconductor chip, and a plurality of dummy pads on the first semiconductor chip, the plurality of dummy pads being spaced apart from each other and from the contact pad along a second direction, and the dummy pads having same heights as the contact pads as measured between respective top and bottom surfaces along the first direction.