Dummy Pattern Layouting for CMP Stress Suppression
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Solution Overview
Problem
The existing semiconductor integrated circuits face issues with bending or partial drop-out of dummy patterns during chemical mechanical polishing (CMP) due to mechanical stress, which can lead to damage to adjacent patterns and increased processing time.
Innovation Solution
A semiconductor integrated circuit design featuring a dummy pattern with a first metal portion in a frame shape, second metal portions on the inner periphery, and non-forming areas, which are arranged to reduce mechanical stress and prevent bending or drop-out by distributing stress across multiple faces, thereby improving the durability and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If dummy pattern is formed as independent metal portions like islands, then it is easy to form and position, but bending or partial drop-out occurs during CMP due to mechanical stress
Solution Approach 1:
The patent connects multiple independent metal portions (islands) with metal portions forming a continuous structure. This merging approach maintains the ease of forming individual islands while preventing bending and drop-out during CMP by creating a unified structural framework that distributes mechanical stress across the entire dummy pattern rather than concentrating it on isolated islands.
2Manufacturing precision
If dummy pattern is formed to fill space areas, then pattern uniformity is improved, but mechanical stress during CMP causes bending or drop-out
Solution Approach 1:
The patent creates a composite dummy pattern structure combining filled space areas with connecting metal portions. The filling maintains pattern uniformity and space utilization, while the connecting portions form a reinforcement framework that distributes mechanical stress, preventing bending and drop-out during CMP processing.
3Reliability
If dummy pattern uses solid metal portions, then stress distribution is improved, but processing time increases due to longer polishing required
Solution Approach 1:
The patent segments the dummy pattern into filled space areas and connecting metal portions with optimized geometry. This segmentation allows the pattern to distribute stress effectively through the connecting structures while maintaining processing efficiency by reducing excessive material volume that would require extended polishing time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design effectively suppresses bending or partial drop-out of the dummy pattern, maintaining desired characteristics, reducing damage to adjacent patterns, and enabling faster and more efficient semiconductor integrated circuit manufacturing.
Implementation Method 1
In CMP, abrasive cloth is pushed against the surface of the semiconductor wafer and the semiconductor wafer is revolved while being rotated on its own axis under the flow of slurry containing a fine powder of alumina or of SiO2 onto the surface of the semiconductor wafer. By CMP, the surface of the semiconductor wafer is polished into a flat surface.
Data Source
AI summary
A semiconductor integrated circuit and a pattern lay-outing method for the same are disclosed, which can suppress bending or partial drop-out of a dummy pattern even when a mechanical stress acts on the dummy pattern in CMP. The semiconductor integrated circuit includes predetermined functional areas and a dummy pattern formed in a space area. The space area is positioned between predetermined functional areas. The dummy pattern includes a first metal portion formed in the shape of a frame and defining an outer edge of the dummy pattern, a second metal portion positioned on an inner periphery side of the first metal portion and formed so as to be continuous with the first metal portion, and a plurality of non-forming areas positioned in an area where the second metal portion is not formed on the inner periphery side of the first metal portion.