Dummy Pattern Insertion for Electroplating Filling Material Loss
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Solution Overview
Problem
Conventional electroplating processes for integrated circuits suffer from void formation and filling material losses due to uneven pattern density, leading to open circuits and increased costs, particularly at high pattern density edges and along the plating flow direction.
Innovation Solution
A method is developed to determine pattern density differences between circuit patterns and insert dummy patterns to reduce the local line edge density gradient, thereby compensating for filling material losses by adjusting the pattern density to prevent voids and improve the uniformity of filling material distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional bottom-up filling processes are used with accelerators and suppressors, then filling material is deposited into trenches, but suppressors are displaced from the bottom of trenches by accelerators causing slower bottom up rates and losses in filling material
Solution Approach 1:
The patent applies preliminary action by inserting dummy patterns into the layout before the electroplating process. These dummy patterns are strategically placed in low-density regions to pre-compensate for the expected filling material loss, ensuring that the actual circuit patterns receive adequate material during plating without requiring process parameter adjustments.
Solution Approach 2:
The patent implements local quality by applying different pattern densities to different regions of the layout. Dummy patterns are inserted specifically in low-density regions where filling material loss is most severe, while high-density regions maintain their original pattern density. This localized compensation approach addresses the specific problem areas without unnecessarily modifying regions that already have sufficient pattern density.
2Manufacturing precision
If suppressors are added to inhibit current flow at high pattern density edges, then deposition control is improved, but a higher concentration of suppressors is adsorbed causing slower bottom up rates
Solution Approach 1:
The patent uses dummy patterns as an intermediary element to mediate between the conflicting requirements of deposition control and productivity. Instead of relying solely on suppressor concentration adjustments, the dummy patterns serve as a physical intermediary that modifies the local pattern density to achieve both controlled deposition and maintained plating speed.
3Manufacturing precision
If pattern density is increased to reduce filling material losses, then material distribution uniformity improves, but the complexity of layout design increases
Solution Approach 1:
The patent applies copying by creating simplified dummy pattern structures that replicate the essential function of density compensation without requiring complex design rules. The dummy patterns use standard geometric shapes and placement rules that mirror existing pattern design practices, making them easy to generate and integrate into the existing layout workflow.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces filling material losses and avoids voids by minimizing the pattern density gradient, enhancing the yield and reducing costs associated with material waste and process inefficiencies.
Implementation Method 1
Electroplating (ECP) processes are critical to the fabrication of integrated circuits (IC). In ECP processes, filling material such as copper (Cu) is patterned using a damascene process where trenches are etched into an oxide (or other dielectric) material and a filling material is deposited into a semiconductor wafer to fill up the trenches.
Implementation Method 2
Additive chemicals such as accelerators and suppressors are added to the plating solution in an ECP process and are adsorbed on the wafer surface to accelerate or suppress local deposition rates.
Data Source
AI summary
A computer-implemented system and method of compensating for filling material losses in a semiconductor process. The computer-implemented method includes determining using a computer a pattern density difference between a first circuit pattern above a semiconductor substrate and a second circuit pattern adjacent to the first pattern. A dummy pattern is inserted between the first pattern and the second pattern so as to compensate for an estimated loss of filling material induced during electrochemical plating by the pattern density difference exceeding a threshold pattern density difference.