Interconnect Dummy Pattern Layout for Interposer Warpage Control
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Solution Overview
Problem
The warpage of interposers due to stress from interconnection layers in semiconductor packages leads to defects during the attachment of wafers to interposers.
Innovation Solution
A method of designing an interconnect structure for semiconductor apparatuses, which includes determining the layout of main metal patterns, the number of interconnection layers, and the layout of dummy metal patterns based on the main metal patterns and interconnection layers, to control the local dummy pattern density and manage stress.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If interconnection layers are added to electrically connect semiconductor devices to interposers, then electrical connectivity is improved, but stress-induced warpage of the interposer increases
Solution Approach 1:
The patent applies local quality by introducing dummy metal patterns with varying densities in different regions of the interconnection layers. Specifically, regions with higher dummy pattern density are placed in areas where stress accumulation would cause excessive warpage, while regions with lower dummy pattern density are placed where less stress compensation is needed. This localized variation in dummy pattern density allows selective stress compensation without compromising overall electrical connectivity.
Solution Approach 2:
The patent changes the parameter of dummy metal pattern density to control and compensate for stress-induced warpage. By adjusting the density of dummy metal patterns in different regions of the interconnection layers, the patent modifies the stress distribution characteristics to reduce interposer warpage while maintaining necessary electrical connectivity through the interconnection layers.
2Shape
If dummy metal patterns are added to compensate for stress, then interposer warpage is reduced, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent applies local quality by introducing dummy metal patterns with varying densities in different regions of the interconnection layers. Specifically, regions with higher dummy pattern density are placed in areas where stress accumulation would cause excessive warpage, while regions with lower dummy pattern density are placed where less stress compensation is needed. This localized variation in dummy pattern density allows selective stress compensation without compromising overall electrical connectivity.
Solution Approach 2:
The patent changes the parameter of dummy metal pattern density to control and compensate for stress-induced warpage. By adjusting the density of dummy metal patterns in different regions of the interconnection layers, the patent modifies the stress distribution characteristics to reduce interposer warpage while maintaining necessary electrical connectivity through the interconnection layers.
Data Source
AI summary
A method of designing an interconnect structure of a semiconductor apparatus is provided. The interconnect structure includes interconnection layers sequentially stacked on a semiconductor substrate, and each of the interconnection includes dummy metal patterns and main metal patterns. The method includes: determining a layout of the main metal patterns included in each of the plurality of interconnection layers; determining a number of interconnection layers in the plurality of interconnection layers; and determining a layout of the dummy metal patterns included in each of the plurality of interconnection layers based on the determined layout of the main metal patterns and the determined number of interconnection layers.