Dummy Patterns for Vertical Semiconductor Word Line Pad Monitoring

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Solution Overview

Problem

The process of forming staircase word-line pad structures in vertical-type semiconductor devices is prone to failures due to large variations in size, necessitating a new method for real-time monitoring and control of word line pad dimensions during fabrication.

Innovation Solution

Incorporating dummy patterns on the semiconductor device substrate to serve as reference lines for monitoring the critical dimensions of word line pads in real-time, both before and after etching processes, ensuring precise alignment and size consistency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a staircase word-line pad structure is formed in vertical-type semiconductor devices, then metal contacts can be connected on the word-line pads, but large variation in size of the word line pads occurs causing process failure

Engineering Contradiction:
Improveprocess success rateVSAvoidword line pad size consistency
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

Dummy patterns are formed in advance before the actual word-line pad structure fabrication. These dummy patterns serve as reference standards that are measured and monitored throughout the manufacturing process to detect and correct dimensional variations in real-time, preventing process failures before they occur.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dummy patterns establish a feedback mechanism where critical dimensions are monitored against predetermined reference values. Any deviations detected through measurement and inspection allow for real-time adjustments to be made during the manufacturing process, ensuring consistent word-line pad dimensions and improving overall process reliability.

Inventive Principle:
Principle #23Feedback

2Manufacturing precision

If real-time monitoring of word line pad dimensions is implemented, then fabrication errors are reduced, but additional dummy patterns and measurement processes are required

Engineering Contradiction:
Improveword line pad dimension accuracyVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Dummy patterns are created as simplified copies or replicas of the actual word-line pad structures. These dummy patterns replicate the critical geometric features and dimensions, allowing for measurement and monitoring without requiring complex measurement setups. The dummy patterns serve as stand-in references that can be easily fabricated and measured using standard processes.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9748257B2Semiconductor devices having dummy patterns and methods of fabricating the same
Publication Date: 2017.08.29 SAMSUNG ELECTRONICS CO LTD
  • US9748257B2 patent drawing
  • US9748257B2 patent drawing
  • US9748257B2 patent drawing

AI summary

Provided are semiconductor devices and methods of fabricating the same. The semiconductor devices may include a substrate with a cell region and a peripheral region, a gate stack including gates stacked on the cell region of the substrate. At least one edge portion of the gate stack may have a staircase structure. The semiconductor devices may also include a channel that extend through the gate stack and is enclosed by a memory layer and at least two dummy patterns on the substrate. The at least two dummy patterns may be spaced apart from the gate stack and may be spaced apart from each other.