Dummy Pixel ESD Protection for Display Devices

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Solution Overview

Problem

As display devices for tablets and smartphones increase in inch size, the longer wiring lengths lead to increased charge amounts, potentially causing damage to elements within the display area due to electrostatic discharge (ESD) during manufacturing.

Innovation Solution

Incorporating a dummy pixel area outside the display area with a gate line and a semiconductor layer that crosses the gate line, electrically separated from adjacent dummy pixels, to absorb and dissipate static electricity, thereby preventing ESD damage to the pixels within the display area.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the inch size of display device is increased, then the display area is enlarged, but the wiring length increases and charge amount increases leading to ESD damage risk

Engineering Contradiction:
Improvedisplay areaVSAvoidESD damage
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent introduces a dummy pixel as an intermediary structure between the display area and the external environment. This dummy pixel includes a semiconductor layer and gate line that act as a mediator to intercept and dissipate static electricity before it can reach and damage the actual display elements through the wiring.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent converts the harmful static electricity that would normally cause ESD damage into a beneficial protective mechanism. By designing the dummy pixel to intentionally accumulate and dissipate charge, the harmful electrostatic energy is transformed into a protective function that safeguards the display area.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Reliability

If dummy pixels are arranged outside the display area, then ESD damage is avoided, but the device structure becomes more complex

Engineering Contradiction:
ImproveESD protectionVSAvoiddummy pixel structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by creating a specialized region (dummy pixel area) with different structural characteristics from the main display area. The dummy pixel has a simplified structure focused solely on ESD protection functions, while the display area maintains its full functional complexity, thus localizing the protective function without unnecessarily complicating the entire device.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively avoids ESD damage to the display area by redirecting static electricity to the dummy pixel area, ensuring the integrity and functionality of the display device.

Implementation Method 1

a charge amount of the wiring is increased and an element within the display area may be broken disadvantageously

Methodology Applied
Scientific EffectElectrostatic discharge: Electrostatic Discharge

Data Source

PatentUS10120253B2Display device
Publication Date: 2018.11.06 MAGNOLIA WHITE CORP
  • US10120253B2 patent drawing
  • US10120253B2 patent drawing
  • US10120253B2 patent drawing

AI summary

A display device is provided with a pixel and a dummy pixel including a gate line and a signal line. The dummy pixel includes the gate line and a dummy semiconductor layer crossing the gate line through an insulating layer. The dummy semiconductor layer is electrically separated from the dummy semiconductor layer of the dummy pixel adjacent in the Y direction dummy pixel. The dummy pixel further includes a dummy signal line extending in the Y direction. The dummy signal line is connected to the dummy semiconductor layer through a plurality of contact holes. The contact holes are arranged with the gate line interposed between them in plan view.