Dummy Point Add Circuit for RSA Timing Attack Defense

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Solution Overview

Problem

Existing RSA cryptosystem implementations are vulnerable to timing attacks, where an attacker can obtain the private key by measuring the time taken to process each bit in the RSA calculation, leading to potential security breaches.

Innovation Solution

A method involving a point double calculation circuit, a point add calculation circuit, and a dummy point add calculation circuit is employed to perform RSA cryptosystem operations. The dummy point add calculation emulates the time of a point add operation without altering the calculation result, thereby masking the processing time differences.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional RSA decryption calculation is performed without dummy operations, then calculation efficiency is maintained, but the system becomes vulnerable to timing attacks that can reveal the private key

Engineering Contradiction:

Improvesecurity against timing attackVSAvoidcalculation efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

A dummy point add calculation circuit is introduced as an intermediary component that executes dummy operations when not needed, masking the timing characteristics from attackers while maintaining the legitimate decryption functionality through the point double and point add calculation circuits

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The system dynamically changes the execution parameters by conditionally inserting dummy point add operations based on the actual computation needs, ensuring that the total execution time remains constant regardless of the private key bits, thus preventing timing attacks

Inventive Principle:

Principle #35Parameter changes

2Reliability

If dummy point add calculation operations are performed to prevent timing attacks, then security is improved, but device complexity increases due to additional circuits

Engineering Contradiction:

Improvesecurity against timing attackVSAvoidcircuit structure

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The dummy point add calculation circuit shares the same structural framework and operational logic as the real point add calculation circuit, allowing both circuits to be designed once and reused in different contexts (dummy vs. real operations), thereby reducing the actual complexity increase despite the added security layer

Inventive Principle:

Principle #6Universality (Multi-functionality)

Data Source

PatentUS12273435B2Method of defense against cryptosystem timing attack, associated cryptosystem processing circuit, and associated electronic device

Publication Date: 2025.04.08 REALTEK SEMICON CORP

AI summary

A method of defense against cryptosystem timing attack such as Rivest-Shamir-Adleman (RSA) cryptosystem timing attack, an associated cryptosystem processing circuit and an associated electronic device are provided. The method may include: utilizing a point double calculation circuit to perform a plurality of point double calculation operations related to a predetermined cryptosystem; utilizing a point add calculation circuit to perform a plurality of point add calculation operations related to the predetermined cryptosystem; and in response to there being no need to perform any point add calculation operation related to the predetermined cryptosystem, utilizing a dummy point add calculation circuit to perform a dummy point add calculation operation to emulate a calculation time of performing the any point add calculation operation, without changing a calculation result before performing the dummy point add calculation operation.