Dummy Power Pad Layout for Stronger I/O ESD Protection

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Solution Overview

Problem

Existing semiconductor devices face limitations in electrostatic discharge (ESD) protection, particularly at input/output pads, where the filler pads lack ESD protection and can act as paths for overcurrent, necessitating a low-cost and high-efficiency solution to enhance ESD protection without additional circuits.

Innovation Solution

Incorporating dummy power/ground pads with clamp circuits adjacent to signal pads, which do not transmit power or signals but provide ESD protection by discharging excess charges through power or ground metal rings, thereby increasing the ESD protection efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If filler pads are used in the pad area where input/output pads are not disposed, then the pad area is fully utilized, but the ESD protection performance is compromised as filler pads may serve as paths for overcurrent

Engineering Contradiction:
Improvepad area utilizationVSAvoidESD protection performance
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The dummy power pad is designed to serve multiple functions: it acts as a filler pad to utilize the pad area fully, while simultaneously providing ESD protection through the integrated clamp circuit. This multi-functional design resolves the contradiction by making the filler pad also perform the protective function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The clamp circuit in the dummy power pad converts the potentially harmful overcurrent path into a beneficial ESD protection mechanism. When ESD occurs, the clamp circuit actively discharges the overcurrent through the power metal ring, transforming the filler pad's weakness into a protective feature.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Device complexity

If only bypass circuits in input/output pads are used for ESD protection, then the device structure is kept simple, but the ESD protection capability is insufficient

Engineering Contradiction:
Improvecircuit structureVSAvoidESD protection capability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The ESD protection capability is enhanced by merging the dummy power pad with a clamp circuit into a single integrated structure. This combination provides superior ESD protection compared to simple bypass circuits while maintaining reasonable device complexity through shared power metal rings.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If additional circuits are added to enhance ESD protection, then the ESD protection performance is improved, but the device cost and complexity increase

Engineering Contradiction:
ImproveESD protection performanceVSAvoidcircuit configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dummy power pad serves dual purposes as both a filler pad for area utilization and an ESD protection device through the clamp circuit, eliminating the need for separate additional ESD protection circuits and reducing overall device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The dummy power pad with clamp circuit provides ESD protection for adjacent signal pads autonomously, without requiring additional external protection circuits. The power metal rings serve both the dummy pad and the ESD protection function, reducing overall circuit complexity.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enhances ESD protection for semiconductor devices by reducing the resistance of power metal rings and improving the efficiency of ESD discharge, effectively safeguarding the core logic unit and signal pads from electrostatic damage.

Implementation Method 1

a dummy power/ground pad disposed at a position of a filler pad, wherein the dummy power/ground pad does not function exchange the power, the input signal, and the output signal with the core logic unit

Methodology Applied
Scientific EffectElectrostatic Discharge: Electrostatic Discharge

Data Source

PatentUS20230411310A1Semiconductor device including a dummy power pad and a pad placement method thereof
Publication Date: 2023.12.21 SAMSUNG ELECTRONICS CO LTD
  • US20230411310A1 patent drawing
  • US20230411310A1 patent drawing
  • US20230411310A1 patent drawing

AI summary

A semiconductor device includes: at least one signal pad including power metal rings and configured to exchange an input/output signal with an input/output circuit; and a dummy power pad disposed adjacent to the at least one signal pad, wherein the dummy power pad includes a first clamp circuit connected to at least one of the power metal rings.