Dummy Read Word-Line Biasing for Lower NAND Memory Current
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Solution Overview
Problem
Existing semiconductor memory devices face issues with read errors due to shifts in threshold voltage (Vth) of memory cells caused by changes in word line read timing and ramping parameters, leading to increased current consumption (Icc) during dummy read operations, which can exceed system capabilities and affect power management.
Innovation Solution
Performing a dummy read operation with controlled voltage pulses, where programmed and unprogrammed word lines receive different voltage biases, reducing the ramp rate and current consumption by independently managing the ramp rates and clock durations for different word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a dummy read operation is performed with uniform voltage pulses on all word lines, then the read operation can be completed, but current consumption increases excessively causing power management issues
Solution Approach 1:
The patent applies different voltage pulse magnitudes to different word line groups: a first voltage pulse (higher magnitude) is applied to programmed word lines, while a second voltage pulse (lower magnitude) is applied to unprogrammed word lines. This local differentiation reduces overall current consumption during dummy read operations while maintaining reliable read functionality for programmed lines.
2Device complexity
If the same voltage pulse is applied to all word lines during dummy read, then the operation is simple, but read errors increase due to Vth shifts in erased word lines
Solution Approach 1:
The patent differentiates voltage pulse application by word line programming state: programmed word lines receive the first voltage pulse to ensure stable reading, while unprogrammed word lines receive the second, lower voltage pulse to minimize Vth shifts and prevent read errors. This localized approach maintains operational simplicity while significantly improving read reliability.
Solution Approach 2:
The patent applies a lower voltage pulse to unprogrammed word lines as a preventive measure against Vth shifts that would cause read errors. By anticipating the potential harm of excessive voltage on erased lines, the system preemptively uses reduced voltage to protect against threshold voltage changes before they can cause read failures.
3Reliability
If high voltage pulses are used during dummy read operations, then read stability is improved, but current spikes exceed system capabilities
Solution Approach 1:
The patent applies high voltage pulses selectively only to programmed word lines where they are needed for stable reading, while using lower voltage pulses for unprogrammed word lines. This localized high-voltage application maintains read stability for active data while preventing excessive current spikes that would occur if uniform high voltage was applied to all word lines.
Data Source
AI summary
A memory device includes a memory block including a plurality of memory cells and control circuitry configured to perform a dummy read operation to transition memory cells of the memory block from a first read condition to a second read condition. To perform the dummy read operation, the control circuitry is configured to, subsequent to performing a programming operation on a selected word line and prior to performing a programming operation on a next word line, supply a first voltage pulse to bias the selected word line and previously programmed word lines in the memory block, and, while supplying the first voltage pulse, supply a second voltage pulse to bias unprogrammed word lines in the memory block including the next word line. The second voltage pulse has a lower magnitude than the first voltage pulse.