Dummy Region Buffering Tungsten Plug CMP Overetch

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Solution Overview

Problem

The existing chemical mechanical polishing (CMP) processes for tungsten in integrated circuits suffer from severe overetch at the boundary between tungsten arrays and dielectric spaces, leading to recess formation and electrical shorts during subsequent metal deposition steps.

Innovation Solution

A dummy region system is formed between the tungsten plug array and the dielectric space, with a varying amount of tungsten plugs or trenches that act as a buffer to absorb erosive forces and reduce overetch, comprising a first region of tungsten plugs, a second region of dielectric, and a third region of dummy plugs or trenches that decrease in tungsten density from the plug array to the dielectric space.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If CMP process is used to remove excess tungsten and planarize plugs, then planarization is achieved, but severe overetch occurs at the boundary between tungsten arrays and dielectric spaces causing recess formation

Engineering Contradiction:

Improveplanarization qualityVSAvoidoveretch and recess formation

Core Design Contradiction:

Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

A dummy region is formed adjacent to the tungsten plug array perimeter before the CMP process. This dummy region acts as a sacrificial buffer that absorbs the erosive forces during CMP, preventing overetch at the actual device boundary. The dummy region is subsequently removed after serving its protective function.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The dummy region serves as an intermediary buffer zone between the tungsten plug array and the dielectric space. During CMP, this intermediate structure absorbs the harmful erosive forces, protecting the actual device structures from overetch while allowing the CMP process to proceed for planarization.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Quantity of substance

If blanket tungsten deposition is performed to fill vias, then via filling is achieved, but non-planar topography is created requiring additional CMP steps

Engineering Contradiction:

Improvetungsten fill completenessVSAvoidsurface planarity

Core Design Contradiction:

Quantity of substanceVSShape

Solution Approach 1:

The wafer surface is segmented into distinct regions: the via array region, the dummy region, and the dielectric space. This segmentation allows the CMP process to affect different areas differently, with the dummy region absorbing excess material removal while protecting the via array region, thereby achieving both complete via filling and acceptable surface planarity.

Inventive Principle:

Principle #1Segmentation

3Loss of substance

If CMP overetch is severe at tungsten array boundaries, then material removal is enhanced, but electrical shorts occur due to trapped metal layers

Engineering Contradiction:

Improveexcess tungsten removalVSAvoidelectrical short prevention

Core Design Contradiction:

Loss of substanceVSReliability

Solution Approach 1:

The dummy region is prepared in advance as a sacrificial structure that will be preferentially removed during CMP. This preliminary action ensures that when CMP proceeds, the erosion occurs in the dummy region rather than at the device boundaries, preventing the formation of trapped metal layers that would cause electrical shorts.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The naturally occurring erosive forces of the CMP process, which normally cause harmful overetch at device boundaries, are redirected to act on the dummy region instead. The harmful erosion is converted into a beneficial protective mechanism where the dummy region sacrificially absorbs the damage, protecting the actual devices and preventing electrical shorts.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces erosion and overetch at the boundary, minimizing the risk of electrical shorts and enhancing product yield by protecting the tungsten plug array from severe erosive stresses during CMP.

Implementation Method 1

planarization of tungsten by CMP is the preferred process

Methodology Applied

Scientific EffectChemical mechanical polishing:

Implementation Method 2

Tungsten is also a good plug material because of its ability to uniformly fill high-aspect ratio vias when deposited by chemical vapor deposition (CVD)

Methodology Applied

Scientific EffectChemical vapor deposition: Chemical Vapour Deposition

Data Source

PatentUS7741719B2Integrated circuit system with dummy region

Publication Date: 2010.06.22 CHARTERED SEMICON MFG LTD

AI summary

An integrated circuit system comprised by forming a first region, a second region and a third region within a dielectric over a substrate. The first region includes tungsten plugs. The second region is formed adjacent at least a portion of the perimeter of the first region and the third region is formed between the first region and the second region. An opening is formed in the third region and a material is deposited within the opening for preventing erosion of the first region.