Dummy Silicon Shelf Layout for Thermal Compression Bonding

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Solution Overview

Problem

Advanced semiconductor package architectures face challenges due to the singulation process, which introduces mold shelves with low thermal conductivity, leading to reduced TCB process windows and higher yield losses, and existing high-thermal conductivity mold materials are limited by reliability issues and temperature gradients.

Innovation Solution

Implementing semiconductor packages with dummy silicon regions that replace mold shelves, enhancing thermal conductivity and process yield without increasing manufacturing costs, by positioning these regions at the peripheral edges of composite dies with top surfaces coplanar to the dies, thereby improving heat transfer during thermal compression bonding.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the singulation process is used to cut the silicon wafer into final products, then the manufacturing process is completed, but the mold shelf is introduced which has extremely low thermal conductivity

Engineering Contradiction:

Improvesingulation process completionVSAvoidthermal conductivity

Core Design Contradiction:

Ease of manufactureVSReliability

Solution Approach 1:

The patent removes the mold shelf from the package structure by designing the singulation cut to occur at the interface between the mold compound and the substrate, rather than through the mold compound itself. This extraction of the harmful mold shelf element eliminates the thermal conductivity bottleneck while preserving the encapsulation function.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of cutting through the mold compound as in conventional processes, the patent inverts the approach by positioning the cut at the mold-substrate interface. This inversion changes the cut location from within the low-thermal-conductivity material to the boundary, thereby avoiding the thermal conductivity penalty.

Inventive Principle:

Principle #13The other way round (Inversion)

2Reliability

If high-thermal conductivity mold materials are used, then thermal conductivity is improved, but reliability issues and higher process costs occur

Engineering Contradiction:

Improvethermal conductivityVSAvoidmanufacturing reliability and cost

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The patent converts the harmful effect of the mold shelf (low thermal conductivity) into a benefit by using the mold-substrate interface as the singulation plane. This approach eliminates the need for expensive high-thermal-conductivity mold materials while achieving superior thermal performance through the substrate's inherent conductivity.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If the bond head peak temperature and pedestal temperature are increased, then thermal conductivity is improved, but larger temperature gradients are created leading to excessive substrate expansion and non-uniform solder melting

Engineering Contradiction:

Improvethermal conductivityVSAvoidsubstrate expansion control and solder melting uniformity

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent performs preliminary thermal management by eliminating the mold shelf before the TCB process. This preliminary action ensures that the thermal pathway is optimized in advance, allowing the TCB process to proceed with standard temperature profiles without creating excessive gradients or expansion issues.

Inventive Principle:

Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution significantly increases thermal conductivity, expands the TCB process window, and enhances yield while maintaining cost-effectiveness, by eliminating the heat loss effect and allowing for better thermal management in advanced packaging technologies.

Implementation Method 1

enhancing thermal conductivity and process yield without increasing manufacturing costs, by positioning these regions at the peripheral edges of composite dies with top surfaces coplanar to the dies, thereby improving heat transfer during thermal compression bonding

Methodology Applied

Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS11901333B2No mold shelf package design and process flow for advanced package architectures

Publication Date: 2024.02.13 INTEL CORP

AI summary

Embodiments include semiconductor packages and a method to form such semiconductor packages. A semiconductor package includes a plurality of dies on a substrate, and an encapsulation layer over the substrate. The encapsulation layer surrounds the dies. The semiconductor package also includes a plurality of dummy silicon regions on the substrate. The dummy silicon regions surround the dies and encapsulation layer. The plurality of dummy silicon regions are positioned on two or more edges of the substrate. The dummy silicon regions have a top surface substantially coplanar to a top surface of the dies. The dummy silicon regions include materials that include silicon, metals, or highly-thermal conductive materials. The materials have a thermal conductivity of approximately 120 W/mK or greater, or is equal to or greater than the thermal conductivity of silicon. An underfill layer surrounds the substrate and the dies, where the encapsulation layer surrounds portions of the underfill layer.