Dummy Transistor Floating Layout for IC Leakage Control

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Solution Overview

Problem

The configuration of dummy transistors in integrated circuits creates a leakage current due to voltage differences with active transistors, degrading accuracy and functionality, and conventional methods to reduce this current increase capacitance, thereby degrading operational speed.

Innovation Solution

The dummy transistors are coupled in a series configuration with their conductive regions maintained in a floating state to control leakage current between active transistors, reducing voltage differences and minimizing capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If dummy transistors are configured with gate regions at the same voltage level as source regions and/or drain regions to be electrically inactive, then transistor matching is improved, but leakage current is generated between active transistors and dummy transistors

Engineering Contradiction:
Improvetransistor matching accuracyVSAvoidleakage current
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The dummy transistor is divided into multiple segments: a first dummy transistor with gate at same voltage as source/drain (for matching) and a second dummy transistor with gate at different voltage (to block leakage). This segmentation allows each part to fulfill different functions simultaneously.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The second dummy transistor acts as an intermediary element between the active transistor and the first dummy transistor. It blocks the leakage current path while allowing the first dummy transistor to maintain voltage equality for matching purposes.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-generated harmful factors

If conventional methods are used to reduce leakage current, then leakage current is reduced, but capacitance increases and operational speed degrades

Engineering Contradiction:
Improveleakage currentVSAvoidoperational speed
Core Design Contradiction:
Object-generated harmful factorsVSSpeed

Solution Approach 1:

The invention changes the voltage parameter of the gate region in the second dummy transistor to create a voltage difference that blocks leakage current. This parameter change achieves leakage reduction without adding capacitive loading that would slow down operation.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP4273930A1System for controlling leakage current in integrated circuits
Publication Date: 2023.11.08 NXP BV
  • EP4273930A1 patent drawingFigure 1
  • EP4273930A1 patent drawingFigure 2
  • EP4273930A1 patent drawingFigure 3

AI summary

An integrated circuit (IC) includes one or more active transistors and multiple series-coupled dummy transistors. The dummy transistors are coupled between two active transistors and/or at the ends of each active transistor. When the dummy transistors are coupled between two active transistors, apart from two conductive regions that are coupled to two active transistors, each remaining conductive region of the dummy transistors is maintained in a floating state to control a leakage current between the two active transistors. Similarly, when the dummy transistors are coupled at an end of one active transistor, apart from one conductive region that is coupled to the active transistor, each remaining conductive region of the dummy transistors is maintained in the floating state to control a leakage current between the active transistor and the dummy transistors.