Dummy-Trench Power MOSFET Structure for Higher Breakdown Voltage

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Solution Overview

Problem

Power semiconductor devices such as VD-MOSFETs and Trench MOSFETs suffer from early avalanche breakdown due to the concentration of electric fields at the bottom of well regions or gate trenches, leading to lower voltage resistance and smaller breakdown voltages.

Innovation Solution

The introduction of dummy trenches and dummy gates in the power semiconductor device structure helps to balance charge distribution and uniformly disperse electric fields, preventing concentration at critical points and thereby increasing the breakdown voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional VD-MOSFET or Trench MOSFET structure is used, then device complexity is reduced and manufacturing is easier, but electric field concentration occurs at well region boundaries or gate trench corners causing early avalanche breakdown

Engineering Contradiction:
Improvebreakdown voltageVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate structure is segmented into multiple gates (first gate, second gate, third gate) positioned at different locations and orientations. These segmented gates create distributed electric field control, preventing concentration at single critical points while maintaining effective channel modulation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A fourth gate is introduced as an intermediary element positioned between the first and second gates. This intermediate gate acts as a mediator to further distribute and smooth the electric field across the channel region, preventing concentration effects while maintaining device control

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If dummy trenches and dummy gates are added to disperse electric field, then breakdown voltage increases and avalanche breakdown is delayed, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvevoltage resistance capabilityVSAvoidmanufacturing ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The multiple gates serve dual functions: they modulate the channel conductivity like conventional gates while simultaneously acting as electric field distribution elements that prevent concentration. This multi-functionality achieves reliability improvement without requiring separate dedicated field-control structures

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The electric field control function is merged with the gate function. The first, second, third, and fourth gates collectively perform both channel modulation and electric field distribution, eliminating the need for separate dummy structures and simplifying the manufacturing process

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If electric field is concentrated at well region or gate trench bottom, then device structure is simpler, but voltage resistance capability decreases and avalanche breakdown occurs early

Engineering Contradiction:
Improvebreakdown voltageVSAvoidgate structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different gates are positioned at specific local regions with different orientations and depths. The first gate is at a first location, the second gate at a second location, the third gate at a third location, and the fourth gate at a fourth location between the first and second gates. This localized differentiation distributes electric field control to specific regions, preventing concentration while maintaining overall device simplicity

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively enhances the voltage resistance capability of the power semiconductor device by increasing the breakdown voltage and delaying avalanche breakdown, while also improving dynamic characteristics such as rise and fall times.

Implementation Method 1

The dielectric layer isolates each dummy gate and the real gate from the doped region, the well region and the drift layer

Methodology Applied
Scientific EffectDielectric isolation: Dielectric

Implementation Method 2

The semiconductor substrate is doped with a first element in a first element family to have a first conductive channel

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

balance the charge and uniformly disperse the electric field through dummy trenches and dummy gates thereof

Methodology Applied
Scientific EffectCharge balance: Coulomb's Law

Implementation Method 4

Compared with Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) made of silicon (Si)-based materials, MOSFETs made of silicon carbide (SIC) materials have higher carrier mobility, faster switching speed and less switching loss

Methodology Applied
Scientific EffectAvalanche breakdown: Avalanche Breakdown

Data Source

PatentUS20250031408A1Power semiconductor device
Publication Date: 2025.01.23 IND TECH RES INST
  • US20250031408A1 patent drawing
  • US20250031408A1 patent drawing
  • US20250031408A1 patent drawing

AI summary

A power semiconductor device includes a semiconductor substrate, a drift layer, a well region, a doped region, two dummy trenches, a gate structure and a dielectric layer. The semiconductor substrate is doped to have a first conductive channel. The drift layer on the semiconductor substrate is doped to have the first conductive channel. The well region on the drift layer is doped to have a second conductive channel having a polarity opposite to that of the first conductive channel. The doped region on the well region is doped to have the first conductive channel. Two dummy trenches pass through the doped region and the well region. Each of the dummy trenches has a dummy gate. The gate structure has a real gate and is between the dummy trenches. The dielectric layer isolates the dummy gate and the real gate from the doped region, the well region and the drift layer.