Dummy UBM Structure for Isolated Routing and Shear Strength
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Solution Overview
Problem
The semiconductor industry faces challenges in improving integration density and reducing device defects while maintaining device performance, particularly in the formation of dummy bumps over redistribution layers (RDLs) and conductive traces, where existing methods fail to ensure adequate shear strength and electrical isolation.
Innovation Solution
The method involves forming a passivation structure with dielectric layers over RDLs and conductive traces, creating openings for active and dummy bumps, where dummy bumps extend through the passivation and polymer structures, ensuring electrical isolation and increased shear strength, and allowing for active routing under dummy bumps to reduce device size and increase routing area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy bumps are formed over RDLs and conductive traces, then electrical isolation and bonding strength are improved, but device complexity and manufacturing difficulty increase
Solution Approach 1:
The patent divides the dummy bump structure into multiple segments: a first dummy bump portion extending through the passivation structure to expose the RDL, and a second dummy bump portion extending through the polymer structure. This segmentation allows each portion to serve specific functions - the first portion provides electrical isolation by exposing the RDL, while the second portion provides bonding strength. The segmentation resolves the contradiction by making the complex structure manageable and functionally optimized.
Solution Approach 2:
The patent introduces intermediary structures between the dummy bumps and the RDLs/conductive traces. The passivation structure (with opening exposing RDL) and polymer structure act as intermediaries that provide both electrical isolation and mechanical support. These intermediary layers mediate between the conflicting requirements of electrical isolation and bonding strength, allowing the dummy bumps to achieve both functions simultaneously.
2Strength
If dummy bumps extend through passivation and polymer structures, then shear strength is enhanced, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies preliminary action by forming the passivation structure and creating its opening before forming the dummy bumps. The polymer structure is then deposited over the passivation structure before the dummy bumps are formed. This sequence of preliminary actions establishes the structural framework and isolation layers in advance, which then guide and support the dummy bump formation process, reducing the precision requirements during the critical bump formation step.
Solution Approach 2:
The patent employs a nested structure where the first dummy bump portion is nested within the passivation structure opening, and the second dummy bump portion is nested within the polymer structure. The passivation structure and polymer structure are nested layers that contain and support the dummy bump portions. This nesting arrangement provides natural alignment and support, reducing the manufacturing precision requirements for the dummy bumps themselves.
3Productivity
If routing is extended under dummy bumps, then integration density increases, but device defect risk increases
Solution Approach 1:
The patent extracts the electrical isolation function from the dummy bump structure itself by creating an opening in the passivation structure that exposes the RDL. This extraction allows the routing to extend under the dummy bumps through the exposed RDL area without creating electrical isolation defects. The isolation function is taken out and provided by the passivation structure layers surrounding the opening, rather than relying on the dummy bump material itself for isolation.
Data Source
AI summary
Methods for forming dummy under-bump metallurgy structures and semiconductor devices formed by the same are disclosed. In an embodiment, a semiconductor device includes a first redistribution line and a second redistribution line over a semiconductor substrate; a first passivation layer over the first redistribution line and the second redistribution line; a second passivation layer over the first passivation layer; a first under-bump metallurgy (UBM) structure over the first redistribution line, the first UBM structure extending through the first passivation layer and the second passivation layer and being electrically coupled to the first redistribution line; and a second UBM structure over the second redistribution line, the second UBM structure extending through the second passivation layer, the second UBM structure being electrically isolated from the second redistribution line by the first passivation layer.


