Dummy Through Vias to Prevent Redistribution Line Cracking
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Solution Overview
Problem
The challenge in semiconductor packaging is the risk of cracking in redistribution lines due to thermal expansion, particularly in regions with mismatched coefficients of thermal expansion, such as the edges and corners of encapsulated integrated circuit dies, which affects the reliability of the devices.
Innovation Solution
Formation of dummy through vias in regions with mismatched thermal expansion coefficients to suppress encapsulant thermal expansion, thereby reducing the risk of cracking in redistribution lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If redistribution lines are formed in regions with mismatched thermal expansion coefficients (edges and corners), then device integration density is improved, but cracking risk increases due to thermal expansion stress
Solution Approach 1:
The patent introduces a dummy via structure as an intermediary element between the redistribution line and the encapsulant. This dummy via acts as a stress-absorbing mediator that prevents direct transmission of thermal expansion stress from the encapsulant to the redistribution line, thereby eliminating cracking while preserving the beneficial thermal expansion mismatch for stress relief
Solution Approach 2:
The dummy via is formed beforehand in the encapsulant at strategic locations before the redistribution lines are deposited. This pre-positioned structural feature provides cushioning protection against future thermal expansion stresses, preventing cracking before it can occur during device operation or testing
2Reliability
If dummy through vias are added to suppress thermal expansion, then reliability of redistribution lines is improved, but device complexity increases
Solution Approach 1:
The dummy vias are not distributed uniformly across the entire device but are strategically placed only in specific regions where thermal expansion mismatch causes cracking (edges and corners). This localized approach provides the necessary reliability improvement while minimizing the increase in overall device complexity
Solution Approach 2:
The dummy via structure is a simplified copy of the functional via structure, using the same basic via formation process and materials but without the complex multi-layer metallization and electrical connection requirements of full functional vias. This allows reliable stress suppression with reduced structural complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dummy through vias help maintain the reliability of semiconductor devices by preventing cracking in redistribution lines during operation or testing, ensuring the integrity and performance of the integrated circuit packages.
Implementation Method 1
dummy through vias formed through an encapsulant in regions where there is a mismatch in coefficients of thermal expansion
Data Source
AI summary
In an embodiment, a device includes: an integrated circuit die including a die connector; a first through via adjacent the integrated circuit die; an encapsulant encapsulating the first through via and the integrated circuit die; and a redistribution structure on the encapsulant, the redistribution structure including a redistribution line, the redistribution line physically and electrically coupled to the die connector of the integrated circuit die, the redistribution line electrically isolated from the first through via, the redistribution line crossing over the first through via.