Dummy Word Line Waveform for 3D NAND Hot Carrier Mitigation
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Solution Overview
Problem
In NAND flash memory, dummy word lines are vulnerable to hot carrier effects, leading to charge trapping and programming disturbances, especially as technology scales and the number of programming shots increases, necessitating a method to mitigate these disturbances.
Innovation Solution
A two-step voltage waveform is applied to dummy memory cells, with a first voltage level during a pre-charge time interval and a higher second voltage level during a programming time interval, to reduce the boosted potential and associated hot carrier effects, thereby alleviating disturbances on edge memory cells and dummy word lines.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy word lines are raised to a bias level to ensure proper program inhibition of unselected NAND strings, then program inhibition is improved, but hot carrier effect and charge trapping in dummy cells increase
Solution Approach 1:
The patent applies a dynamic two-step voltage waveform to the dummy word lines instead of a static bias level. The waveform transitions from a first voltage level (Vdwl1) during a first time interval to a second voltage level (Vdwl2) during a second time interval, allowing the voltage to adapt to different operational phases and reduce hot carrier effects while maintaining program inhibition.
Solution Approach 2:
The patent employs periodic voltage application through the two-step waveform, where the dummy word lines receive different voltage levels at different time intervals. This periodic action with specific timing allows the system to achieve program inhibition during the first interval while reducing hot carrier effects during the second interval.
2Reliability
If multiple dummy word lines are located between GSL/SSL and edge word lines to alleviate programming disturbance, then edge word line protection is improved, but dummy word lines become more vulnerable to hot carrier effects
Solution Approach 1:
The patent applies different voltage levels to different dummy word lines based on their specific positions and functions. The first dummy word line receives the two-step waveform while other dummy word lines may receive different voltage profiles, allowing localized optimization to protect edge word lines while minimizing hot carrier effects on each dummy cell group.
Solution Approach 2:
The patent changes the voltage parameter applied to dummy word lines by using a two-step waveform with distinct voltage levels (Vdwl1 and Vdwl2) and time intervals. This parameter change allows the system to maintain edge word line protection while reducing the voltage stress on dummy cells that causes hot carrier effects.
3Quantity of substance
If the number of programming shots increases to meet multiple-bit per cell requirements, then storage capacity is improved, but hot carrier effect and disturbance become almost inevitable
Solution Approach 1:
The patent applies the two-step voltage waveform to dummy word lines before and during the programming operation on selected NAND strings. This preliminary action on the dummy cells prepares them to withstand the increased programming shots required for multiple-bit per cell storage, preventing charge trapping before it occurs.
Solution Approach 2:
The patent applies counter-action by using the two-step voltage waveform to preemptively counter the hot carrier effects that would be generated by multiple programming shots. The waveform's specific voltage levels and timing are designed to offset the harmful effects before they can cause charge trapping in the dummy cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach diminishes the boosted potential of dummy memory cells, weakens the hot carrier effect, and enhances the boosting efficiency of edge memory cells, reducing threshold voltage disturbances and ensuring proper read operation.
Implementation Method 1
dummy word lines are vulnerable to hot carrier effects, leading to charge trapping and programming disturbances
Implementation Method 2
the edge word lines for the NAND strings are more vulnerable to disturbance caused by Fowler-Nordheim (FN) tunneling or hot carrier effect
Data Source
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AI summary
A memory device includes a plurality of memory cells arranged in series in a semiconductor body. First and second dummy memory cells arranged in series between a first string select switch and a first edge memory cell at a first end of the plurality of memory cells. The first dummy memory cell is adjacent the first edge memory cell, and the second dummy memory cell is adjacent the first string select switch. A channel line includes channels for the plurality of memory cells and the first and second dummy memory cells. Control circuitry is adapted for programming a selected memory cell in the plurality of memory cells corresponding to a selected word line by applying a switching voltage to the first dummy memory cell, the switching voltage having a first voltage level during a first time interval, and thereafter changing to a second voltage level higher than the first voltage level.