Clock Recovery Circuit Using Precoded Duo-Binary Phase Sampling
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Solution Overview
Problem
Existing clock and data recovery devices face challenges in low data rate applications due to randomness of jitter, which complicates clock signal recovery and increases power consumption with the need for additional phase interpolation circuits.
Innovation Solution
A clock and data recovery device that uses precoding data and duo-binary signaling, eliminating the need for a separate phase interpolation circuit by performing integrals and using samplers to determine phase differences between data and clock signals, thereby improving accuracy and reducing error propagation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a separate phase interpolation circuit is used to determine slope changes for clock recovery, then the accuracy of phase detection is improved, but the device complexity and power consumption increase
Solution Approach 1:
The patent combines the phase interpolation function into the existing integrator circuit by using different sampling offsets. The integrator samples the duo-binary signal at multiple offset positions to generate sampling values that inherently contain phase information, eliminating the need for a separate phase interpolation circuit while maintaining phase detection accuracy.
Solution Approach 2:
The integrator circuit is designed to perform multiple functions: it integrates the duo-binary signal for data recovery and simultaneously generates sampling values at different offsets for phase detection. This multi-functional approach allows the same circuit to serve both data recovery and clock recovery purposes without additional complexity.
2Ease of operation
If random jitter and dithering are used for phase detector operation, then the phase detection can be performed, but the reliability deteriorates in low data rate applications due to randomness
Solution Approach 1:
The patent applies precoding to the data before transmission, which transforms the data sequence to ensure sufficient transitions and patterns that are reliable for phase detection even at low data rates. This preliminary processing of data ensures that the received signal contains adequate information for reliable phase detection without depending on random jitter.
3Measurement precision
If duo-binary signaling with precoding is used, then error propagation is prevented and phase detection accuracy is improved, but the device complexity increases due to encoder and decoder requirements
Solution Approach 1:
The patent changes the signal representation parameters by using duo-binary signaling instead of conventional binary signaling. This parameter change in the signal domain provides inherent error prevention properties and improves phase detection accuracy. The encoder and decoder implement straightforward transformations (adding/subtracting previous data values) that, while adding functionality, use simple arithmetic operations rather than complex logic circuits.
Data Source
AI summary
A data transmitting and receiving system includes a first device including an encoder configured to encode row data to generate precoding data and a transmitter configured to transmit the precoding data through a transmission channel and a second device including an integrator configured to perform an integral on the precoding data, an integral sampler including a plurality of samplers configured to output sampling data based on an offset value and an output value of the integrator, a decoder configured to decode outputs of some of the samplers to generate decoded data, and a phase detector configured to detect a phase difference between the precoding data and a clock based on the decoded data and an output of another one of the samplers.