Duobinary Transceiver Adaptive Reference Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional duobinary transceivers face challenges in high-speed operations due to phase difference drift between clock signals and digital signals, leading to errors in decoding three-level duobinary signals under PVT variations, which are not dynamically adjustable with manually set reference voltages.
Innovation Solution
A duobinary transceiver circuit with a precoder using an AND gate and divided-by-two circuit for coding, and a receiver with an adaptive reference voltage control loop and differential amplifiers to dynamically adjust bias currents and reference voltages, allowing for flexible phase relationships and improved decoding accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If conventional duobinary transceivers use manually set reference voltages for decoding three-level duobinary signals, then the device complexity is reduced, but the reliability deteriorates under PVT variations and high-speed operations due to phase difference drift
Solution Approach 1:
The patent implements dynamic reference voltage adjustment by introducing a control loop that continuously adapts the reference voltages based on the actual signal characteristics. The decoder dynamically tracks and compensates for phase difference drift between clock and data signals, transforming the static reference voltage system into a dynamic one that maintains accuracy under PVT variations and high-speed operations.
Solution Approach 2:
The patent employs feedback mechanisms where the decoder monitors the received three-level duobinary signals and adjusts the reference voltages accordingly. This feedback loop enables the system to automatically compensate for phase drift and PVT variations, improving decoding reliability without significantly increasing overall system complexity.
2Productivity
If the transceiver operates at high data transmission rates, then the productivity is improved, but the reliability deteriorates due to phase difference drift between clock signals and digital signals
Solution Approach 1:
The patent makes the reference voltage system dynamic by implementing continuous adjustment mechanisms that adapt to high-speed operation conditions. The decoder dynamically compensates for phase difference drift that occurs at high data transmission rates, enabling reliable decoding even when operating at maximum productivity levels.
Solution Approach 2:
The patent changes the reference voltage parameters dynamically based on operating conditions. By adjusting the reference voltage levels in real-time according to the actual phase relationship between clock and data signals, the system maintains decoding accuracy across different data transmission rates, particularly at high speeds where phase drift is significant.
Data Source
AI summary
The present invention relates to a duobinary transceiver. Specifically, the duobinary transceiver circuit proposed by the invention provides a new circuit configure of a precoder in a typical transceiver and a decoder in a typical receiver, based on a conventional transceiver including a transmitter, a transmission medium, and a receiver.