Duplex Process Controller Data Equalization Without Cycle Delay
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Solution Overview
Problem
In duplexing process control devices, transferring large amounts of control data from the control system controller to the standby system controller prolongs the control cycle, reduces processing performance, and can conflict with program calculations, leading to decreased operational efficiency.
Innovation Solution
The control data targeting program calculations and process input/output by the CPU of the control system controller is stored in a control data memory, with accessed addresses and data transmitted to the standby system controller, where the data is expanded before the standby system's program calculation, optimizing data equalization and reducing cycle length.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If control data is transmitted after the executing process input, calculation process and process output, then control data equalization is achieved, but the control cycle is lengthened and processing performance decreases
Solution Approach 1:
The patent applies preliminary action by transmitting control data during the program calculation period before the process output stage. The control data is transmitted from the control system controller to the standby system controller during the calculation process, allowing the standby controller to receive and expand the data in advance, thus avoiding extension of the control cycle while achieving data equalization.
2Reliability
If matching control data transmission is allocated within the control cycle, then control data equalization is achieved, but the time allocated to program calculation and process input/output is insufficient
Solution Approach 1:
The patent segments the control cycle into distinct periods: program calculation period, process output period, and matching control data transmission period. By allocating specific time segments for data transmission rather than interrupting other operations, the system achieves control data equalization without reducing the time available for program calculation and process input/output operations.
3Productivity
If control data is transmitted during program calculation, then data transfer efficiency is improved, but conflict with program calculation of the standby system may occur
Solution Approach 1:
The patent introduces an intermediary mechanism where control data is first transmitted to a buffer memory in the standby system controller, and then expanded to the control data memory after the standby CPU completes its calculation. This intermediary buffer approach allows efficient data transmission during the program calculation period while preventing conflicts with the standby system's calculation operations.
Data Source
AI summary
An address and a control data accessed when the CPU performs the program calculation in the control data memory of the control system controller are transmitted to the standby system controller, in the standby system controller, the control data transmitted from the control system controller to the address transmitted from the control system controller before the program calculation of the CPU of the standby system controller is expanded, the control data equalization of the control system controller and the standby system controller is performed, the control data is efficiently transmitted from the control system controller to the standby system controller, thus, the processing performance of the duplexing process control device is improved.