DUT Continuity Test Using Digital IO Structures
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Solution Overview
Problem
Existing continuity testing systems rely on analog voltage measurements and adjustable current sources, which are not compatible with digital input and output structures, and do not account for non-standard IO structures lacking electrostatic discharge diodes, limiting their effectiveness in digital systems.
Innovation Solution
A computer-implemented method and system using digital IO structures to determine electrical connections for open and short circuits by measuring resistance-capacitance delay, time domain reflectometry, or a combination of both, without requiring a current source, and by forcing voltage on a single pin while measuring voltage on remaining pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If analog voltage measurement and adjustable current sources are used for continuity testing, then measurement capability is achieved, but device complexity and incompatibility with digital IO structures increase
Solution Approach 1:
The patent replaces analog voltage measurement equipment and adjustable current sources with digital IO structures that use digital read/write operations to perform continuity testing. This substitution eliminates the need for complex analog measurement circuitry while maintaining testing capability through digital signal processing and timing measurements.
Solution Approach 2:
The digital IO structures inherently provide the necessary measurement and control functions without requiring external analog measurement equipment. The IO structures use their own digital capabilities (read/write operations, timing functions) to perform continuity testing, making the system self-sufficient and reducing overall complexity.
2Reliability
If standard IO structures with ESD diodes are used, then protection is provided, but non-standard IO structures without ESD diodes become incompatible
Solution Approach 1:
Instead of requiring IO structures to have ESD diodes for protection, the patent inverts the approach by using the absence of ESD diodes as a detectable characteristic. The continuity testing method identifies whether ESD diodes are present or absent through the testing procedure itself, making the system adaptable to both standard and non-standard IO structures without requiring physical modification or additional protection components.
3Device complexity
If digital IO structures are used without analog measurement equipment, then device complexity is reduced, but measurement precision may be compromised
Solution Approach 1:
The patent changes the measurement parameter from direct voltage measurement to timing-based measurement. By measuring the time duration of digital read/write operations and comparing timing characteristics, the system achieves precise detection of continuity conditions without requiring analog voltage measurement equipment. This parameter transformation maintains precision while simplifying the device architecture.
Solution Approach 2:
The patent substitutes analog voltage measurement with digital timing measurements. Instead of measuring voltage levels with analog equipment, the system uses digital timing functions to detect continuity by measuring operation durations and comparing them against reference values, achieving equivalent measurement precision through a different physical quantity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables precise voltage measurement and effective identification of open and short circuits in digital systems, ensuring compatibility with digital IO structures and eliminating the need for analog voltage measurement and adjustable current sources.
Implementation Method 1
open circuit check comprises of either (a) measuring resistance-capacitance ('RC') delay on DUT IO
Implementation Method 2
using time domain reflectometry ('TDR') or a combination of both
Data Source
AI summary
A method and system for determining short, open, and good connections using digital input and output (TO) structures in a device under test (DUT) continuity test, through the combined methods of using resistance-capacitance (RC) delay, time domain reflectometry (TDR), and forcing voltage on to a single IO pin of the DUT while measuring voltage on remaining IO pins of said DUT. In one embodiment, the combined methods are executed without the DUT in a test socket to produce a first set of test values and also with the DUT in a test socket to produce a second set of test values. The first and second sets of test values are compared to determine if one or more circuits of the DUT have a short circuit, an open circuit, or are a good (have an electrical connection that is not a short circuit or an open circuit) circuit.