Duty Adjustment Circuit for Frequency-Independent Clock Correction
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Solution Overview
Problem
Existing duty adjustment circuits in delay locked loop circuits struggle to accurately correct the duty cycle of output clock signals across varying frequencies, voltages, and temperatures, leading to instability and inefficiency in semiconductor memory devices.
Innovation Solution
A duty adjustment circuit that generates a pulse signal with a constant pulse width regardless of the reference clock signal frequency, using a pulse generator, code generator, and duty adjuster to produce a duty correction clock signal by adjusting the slope of rising and falling transitions based on generated codes, ensuring accurate duty cycle correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a conventional duty adjustment circuit is used, then the circuit structure is simple, but the duty cycle correction accuracy deteriorates when frequency, voltage, or temperature changes
Solution Approach 1:
The duty adjustment circuit is divided into multiple independent functional modules: a pulse generator that creates frequency-independent pulses, a code generator that produces delay codes, and a duty adjuster that applies corrections. This segmentation allows each module to be optimized for its specific function while maintaining overall accuracy across varying operating conditions.
Solution Approach 2:
The circuit dynamically adjusts multiple parameters including pulse width, delay time codes, and adjustment amounts based on detected operating conditions (frequency, voltage, temperature). The pulse generator adapts its output width to maintain constant pulse duration regardless of input frequency changes, enabling accurate duty cycle correction across different operating points.
2Measurement precision
If the pulse width varies with reference clock frequency, then the circuit operation is simple, but the duty cycle correction accuracy deteriorates
Solution Approach 1:
The pulse generator dynamically adjusts its output pulse width based on the input reference clock frequency while maintaining a constant pulse duration. This dynamic adaptation ensures that pulses remain frequency-independent, allowing the duty adjuster to accurately correct duty cycles regardless of frequency variations in the reference clock signal.
3Measurement precision
If frequency-independent pulse generation is implemented, then the duty cycle correction accuracy improves, but the device complexity increases
Solution Approach 1:
A code generator acts as an intermediary between the frequency detection mechanism and the duty adjustment logic. It translates frequency information into appropriate delay codes that control the pulse generation and adjustment timing, enabling frequency-independent operation without requiring complex direct control circuits.
Data Source
AI summary
A duty adjustment circuit, and a delay locked loop circuit and a semiconductor memory device including the same are provided. The duty adjustment circuit includes a pulse generator configured to generate a pulse signal at a constant pulse width regardless of a frequency of a reference clock signal, based on frequency information, a code generator configured to generate a first predetermined number of delayed pulse signals by delaying the pulse signal, as a first code in response to the pulse signal, and a duty adjuster configured to receive a delay clock signal, and generate a duty correction clock signal by adjusting a slope of rising transition and a slope of falling transition of the delay clock signal in response to the first code and a second code.